platform/x86:intel/pmc: Enable SSRAM support for Panther Lake

Enable Panther Lake platforms to achieve PMC information from
Intel PMC SSRAM Telemetry driver and substate requirements data
from telemetry region.

Signed-off-by: Xi Pardee <xi.pardee@linux.intel.com>
Link: https://patch.msgid.link/20250910210629.11198-6-xi.pardee@linux.intel.com
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>

diff --git a/drivers/platform/x86/intel/pmc/core.h b/drivers/platform/x86/intel/pmc/core.h
index b554805db689d52b2e46808001c8b7ae28d7b083..f4dadb696a3142420765e90f4b1acab29f1b737f 100644 (file)
--- a/drivers/platform/x86/intel/pmc/core.h
+++ b/drivers/platform/x86/intel/pmc/core.h
@@ -297,6 +297,8 @@ enum ppfear_regs {
 #define PTL_PMC_LTR_CUR_ASLT                   0x1C28
 #define PTL_PMC_LTR_CUR_PLT                    0x1C2C
 #define PTL_PCD_PMC_MMIO_REG_LEN               0x31A8
+#define PTL_NUM_S0IX_BLOCKER                   106
+#define PTL_BLK_REQ_OFFSET                     55
 
 /* Wildcat Lake */
 #define WCL_PMC_LTR_RESERVED                   0x1B64

diff --git a/drivers/platform/x86/intel/pmc/ptl.c b/drivers/platform/x86/intel/pmc/ptl.c
index 1bbec9856867d5d56f6a22aef235addbcad29b60..1b35b84e06fa2f0c063b320cf6d9c89facf0619b 100644 (file)
--- a/drivers/platform/x86/intel/pmc/ptl.c
+++ b/drivers/platform/x86/intel/pmc/ptl.c
@@ -10,6 +10,17 @@
 
 #include "core.h"
 
+/* PMC SSRAM PMT Telemetry GUIDS */
+#define PCDP_LPM_REQ_GUID 0x47179370
+
+/*
+ * Die Mapping to Product.
+ * Product PCDDie
+ * PTL-H   PCD-H
+ * PTL-P   PCD-P
+ * PTL-U   PCD-P
+ */
+
 static const struct pmc_bit_map ptl_pcdp_pfear_map[] = {
        {"PMC_0",               BIT(0)},
        {"FUSE_OSSE",           BIT(1)},
@@ -515,6 +526,22 @@ static const struct pmc_reg_map ptl_pcdp_reg_map = {
        .lpm_live_status_offset = MTL_LPM_LIVE_STATUS_OFFSET,
        .s0ix_blocker_maps = ptl_pcdp_blk_maps,
        .s0ix_blocker_offset = LNL_S0IX_BLOCKER_OFFSET,
+       .num_s0ix_blocker = PTL_NUM_S0IX_BLOCKER,
+       .blocker_req_offset = PTL_BLK_REQ_OFFSET,
+};
+
+static struct pmc_info ptl_pmc_info_list[] = {
+       {
+               .guid   = PCDP_LPM_REQ_GUID,
+               .devid  = PMC_DEVID_PTL_PCDH,
+               .map    = &ptl_pcdp_reg_map,
+       },
+       {
+               .guid   = PCDP_LPM_REQ_GUID,
+               .devid  = PMC_DEVID_PTL_PCDP,
+               .map    = &ptl_pcdp_reg_map,
+       },
+       {}
 };
 
 #define PTL_NPU_PCI_DEV                0xb03e
@@ -543,8 +570,12 @@ static int ptl_core_init(struct pmc_dev *pmcdev, struct pmc_dev_info *pmc_dev_in
 }
 
 struct pmc_dev_info ptl_pmc_dev = {
+       .pci_func = 2,
+       .regmap_list = ptl_pmc_info_list,
        .map = &ptl_pcdp_reg_map,
+       .sub_req_show = &pmc_core_substate_blk_req_fops,
        .suspend = cnl_suspend,
        .resume = ptl_resume,
        .init = ptl_core_init,
+       .sub_req = pmc_core_pmt_get_blk_sub_req,
 };