typedef uint64 PA;
typedef uint32 PPN;
+typedef uint64 TPA;
+typedef uint32 TPPN;
+
typedef uint64 PhysMemOff;
typedef uint64 PhysMemSize;
#define INVALID_LPN64 ((LPN64)-1)
#define INVALID_PAGENUM ((PageNum)-1)
-#ifdef VMKERNEL
+#if defined(VMKERNEL) || defined(VMKBOOT)
#define INVALID_MPN64 ((MPN64)(uintptr_t)INVALID_MPN)
#endif
#define CPUID_MODEL_NEHALEM_2F 0x2f // Westmere-EX
#define CPUID_MODEL_SANDYBRIDGE_3A 0x3a // Ivy Bridge
#define CPUID_MODEL_SANDYBRIDGE_3E 0x3e // Ivy Bridge-EP
-#define CPUID_MODEL_HASWELL_3C 0x3c
-#define CPUID_MODEL_HASWELL_45 0x45
+
+
+#define CPUID_MODEL_HASWELL_3C 0x3c // Haswell DT
+#define CPUID_MODEL_HASWELL_45 0x45 // Haswell Ultrathin
+
#define CPUID_MODEL_PIII_07 7
#define CPUID_MODEL_PIII_08 8
return CPUID_FAMILY_IS_P6(v) &&
(effectiveModel == CPUID_MODEL_HASWELL_3C ||
- effectiveModel == CPUID_MODEL_HASWELL_45
- );
+ effectiveModel == CPUID_MODEL_HASWELL_45);
}
-
static INLINE Bool
-CPUID_UARCH_IS_ATOM(uint32 v) // IN: %eax from CPUID with %eax=1.
+CPUID_MODEL_IS_CENTERTON(uint32 v) // IN: %eax from CPUID with %eax=1.
{
/* Assumes the CPU manufacturer is Intel. */
- uint32 effectiveModel = CPUID_EFFECTIVE_MODEL(v);
-
- return CPUID_FAMILY_IS_P6(v) &&
- effectiveModel == CPUID_MODEL_ATOM_1C;
+ return CPUID_FAMILY_IS_P6(v) &&
+ CPUID_EFFECTIVE_MODEL(v) == CPUID_MODEL_ATOM_1C;
}