]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
Revert "ARM: dts: Update pcie ranges for dra7"
authorFrank Li <Frank.Li@nxp.com>
Fri, 11 Apr 2025 15:34:54 +0000 (11:34 -0400)
committerKevin Hilman <khilman@baylibre.com>
Mon, 23 Jun 2025 23:07:55 +0000 (16:07 -0700)
This reverts commit c761028ef5e27f477fe14d2b134164c584fc21ee.

The commit being reverted updated the "ranges" property for the sake of
readability. However, this change is no longer appropriate due to the
following reasons:

- On many SoCs, the PCIe parent bus translates CPU addresses to different
values before passing them to the PCIe controller.
- The reverted commit introduced a fake address translation, which violates
the fundamental DTS principle: the device tree should reflect actual
hardware behavior.

Reverting this change prepares for the cleanup of the driver's
cpu_addr_fixup() hook.

Signed-off-by: Frank Li <Frank.Li@nxp.com>
Link: https://lore.kernel.org/r/20250411153454.3258098-1-Frank.Li@nxp.com
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
arch/arm/boot/dts/ti/omap/dra7.dtsi

index b709703f6c0d42a9a76d3a4fcf84ad9f11247382..711ce4c31bb1f994b98174d22e1676922df2d4a5 100644 (file)
                        clock-names = "fck", "phy-clk", "phy-clk-div";
                        #size-cells = <1>;
                        #address-cells = <1>;
-                       ranges = <0x51000000 0x51000000 0x3000>,
-                                <0x20000000 0x20000000 0x10000000>;
+                       ranges = <0x51000000 0x51000000 0x3000
+                                 0x0        0x20000000 0x10000000>;
                        dma-ranges;
                        /**
                         * To enable PCI endpoint mode, disable the pcie1_rc
                         * node and enable pcie1_ep mode.
                         */
                        pcie1_rc: pcie@51000000 {
-                               reg = <0x51000000 0x2000>,
-                                     <0x51002000 0x14c>,
-                                     <0x20001000 0x2000>;
+                               reg = <0x51000000 0x2000>, <0x51002000 0x14c>, <0x1000 0x2000>;
                                reg-names = "rc_dbics", "ti_conf", "config";
                                interrupts = <0 232 0x4>, <0 233 0x4>;
                                #address-cells = <3>;
                                #size-cells = <2>;
                                device_type = "pci";
-                               ranges = <0x81000000 0 0x00000000 0x20003000 0 0x00010000>,
-                                        <0x82000000 0 0x20013000 0x20013000 0 0x0ffed000>;
+                               ranges = <0x81000000 0 0          0x03000 0 0x00010000
+                                         0x82000000 0 0x20013000 0x13000 0 0xffed000>;
                                bus-range = <0x00 0xff>;
                                #interrupt-cells = <1>;
                                num-lanes = <1>;
                        };
 
                        pcie1_ep: pcie_ep@51000000 {
-                               reg = <0x51000000 0x28>,
-                                     <0x51002000 0x14c>,
-                                     <0x51001000 0x28>,
-                                     <0x20001000 0x10000000>;
+                               reg = <0x51000000 0x28>, <0x51002000 0x14c>, <0x51001000 0x28>, <0x1000 0x10000000>;
                                reg-names = "ep_dbics", "ti_conf", "ep_dbics2", "addr_space";
                                interrupts = <0 232 0x4>;
                                num-lanes = <1>;
                        reset-names = "rstctrl";
                        #size-cells = <1>;
                        #address-cells = <1>;
-                       ranges = <0x51800000 0x51800000 0x3000>,
-                                <0x30000000 0x30000000 0x10000000>;
+                       ranges = <0x51800000 0x51800000 0x3000
+                                 0x0        0x30000000 0x10000000>;
                        dma-ranges;
                        status = "disabled";
                        pcie2_rc: pcie@51800000 {
-                               reg = <0x51800000 0x2000>,
-                                     <0x51802000 0x14c>,
-                                     <0x30001000 0x2000>;
+                               reg = <0x51800000 0x2000>, <0x51802000 0x14c>, <0x1000 0x2000>;
                                reg-names = "rc_dbics", "ti_conf", "config";
                                interrupts = <0 355 0x4>, <0 356 0x4>;
                                #address-cells = <3>;
                                #size-cells = <2>;
                                device_type = "pci";
-                               ranges = <0x81000000 0 0x00000000 0x30003000 0 0x00010000>,
-                                        <0x82000000 0 0x30013000 0x30013000 0 0x0ffed000>;
+                               ranges = <0x81000000 0 0          0x03000 0 0x00010000
+                                         0x82000000 0 0x30013000 0x13000 0 0xffed000>;
                                bus-range = <0x00 0xff>;
                                #interrupt-cells = <1>;
                                num-lanes = <1>;