]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
arm64: dts: mediatek: mt7981b-openwrt-one: Enable PCIe and USB
authorSjoerd Simons <sjoerd@collabora.com>
Tue, 23 Dec 2025 12:37:53 +0000 (13:37 +0100)
committerAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Thu, 8 Jan 2026 11:25:19 +0000 (12:25 +0100)
Enable the PCIe controller and USB3 XHCI host on the OpenWrt One
board. The USB controller is configured for USB 2.0 only mode, as the
shared USB3/PCIe PHY is dedicated to PCIe functionality on this board.

Signed-off-by: Sjoerd Simons <sjoerd@collabora.com>
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
arch/arm64/boot/dts/mediatek/mt7981b-openwrt-one.dts

index 2e39e72877301771222dd9005e1c7646c83e0058..7382599cfea299d61c17b7739f19707acacd1e30 100644 (file)
                        linux,default-trigger = "netdev";
                };
        };
+
+       reg_3p3v: regulator-3p3v {
+               compatible = "regulator-fixed";
+               regulator-name = "fixed-3.3V";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+               regulator-boot-on;
+               regulator-always-on;
+       };
+
+       reg_5v: regulator-5v {
+               compatible = "regulator-fixed";
+               regulator-name = "fixed-5V";
+               regulator-min-microvolt = <5000000>;
+               regulator-max-microvolt = <5000000>;
+               regulator-boot-on;
+               regulator-always-on;
+       };
+};
+
+&pcie {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pcie_pins>;
+       status = "okay";
 };
 
 &pio {
+       pcie_pins: pcie-pins {
+               mux {
+                       function = "pcie";
+                       groups = "pcie_pereset";
+               };
+       };
+
        pwm_pins: pwm-pins {
                mux {
                        function = "pwm";
 &uart0 {
        status = "okay";
 };
+
+&usb_phy {
+       status = "okay";
+};
+
+&xhci {
+       phys = <&u2port0 PHY_TYPE_USB2>;
+       vusb33-supply = <&reg_3p3v>;
+       vbus-supply = <&reg_5v>;
+       mediatek,u3p-dis-msk = <0x01>;
+       status = "okay";
+};