media: rzg2l-cru: Use only frame end interrupts

On RZ/G3E the CRU driver relies on the frame end interrupt to detect the
completion of an active frame transfer when stopping DMA.

Update the driver to enable only frame end interrupts (CRUnIE2_FExE),
dropping the usage of the frame start interrupts, which is not required
for this operations flow.

Fix the interrupt status handling in the DMA stopping state by checking
the correct frame end status bits (FExS) instead of the frame start one
(FSxS). Add a dedicated CRUnINTS2_FExS() macro to reflect the actual
register bit layout and drop the now unused CRUnIE2_FSxE() and
CRUnINTS2_FSxS() macros.

This ensures that DMA stopping is triggered by the intended frame end
events and avoids incorrect interrupt handling.

Signed-off-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com>
Signed-off-by: Jacopo Mondi <jacopo.mondi+renesas@ideasonboard.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Signed-off-by: Hans Verkuil <hverkuil+cisco@kernel.org>

diff --git a/drivers/media/platform/renesas/rzg2l-cru/rzg2l-cru-regs.h b/drivers/media/platform/renesas/rzg2l-cru/rzg2l-cru-regs.h
index 10e62f2646d0894d84532a4d2a3d079db4758ba2..23cb50ee8e57fdbbba908abe7d401b7398b53132 100644 (file)
--- a/drivers/media/platform/renesas/rzg2l-cru/rzg2l-cru-regs.h
+++ b/drivers/media/platform/renesas/rzg2l-cru/rzg2l-cru-regs.h
@@ -14,12 +14,11 @@
 
 #define CRUnIE_EFE                     BIT(17)
 
-#define CRUnIE2_FSxE(x)                        BIT(((x) * 3))
 #define CRUnIE2_FExE(x)                        BIT(((x) * 3) + 1)
 
 #define CRUnINTS_SFS                   BIT(16)
 
-#define CRUnINTS2_FSxS(x)              BIT(((x) * 3))
+#define CRUnINTS2_FExS(x)              BIT(((x) * 3) + 1)
 
 #define CRUnRST_VRESETN                        BIT(0)
 

diff --git a/drivers/media/platform/renesas/rzg2l-cru/rzg2l-video.c b/drivers/media/platform/renesas/rzg2l-cru/rzg2l-video.c
index 6aea7c244df1b52be708224b3cfb9dc684d1404e..98b6afbc708dc29540b96d5687ebd76dc78fe062 100644 (file)
--- a/drivers/media/platform/renesas/rzg2l-cru/rzg2l-video.c
+++ b/drivers/media/platform/renesas/rzg2l-cru/rzg2l-video.c
@@ -440,7 +440,6 @@ static int rzg2l_cru_get_virtual_channel(struct rzg2l_cru_dev *cru)
 
 void rzg3e_cru_enable_interrupts(struct rzg2l_cru_dev *cru)
 {
-       rzg2l_cru_write(cru, CRUnIE2, CRUnIE2_FSxE(cru->svc_channel));
        rzg2l_cru_write(cru, CRUnIE2, CRUnIE2_FExE(cru->svc_channel));
 }
 
@@ -700,10 +699,10 @@ irqreturn_t rzg3e_cru_irq(int irq, void *data)
                }
 
                if (cru->state == RZG2L_CRU_DMA_STOPPING) {
-                       if (irq_status & CRUnINTS2_FSxS(0) ||
-                           irq_status & CRUnINTS2_FSxS(1) ||
-                           irq_status & CRUnINTS2_FSxS(2) ||
-                           irq_status & CRUnINTS2_FSxS(3))
+                       if (irq_status & CRUnINTS2_FExS(0) ||
+                           irq_status & CRUnINTS2_FExS(1) ||
+                           irq_status & CRUnINTS2_FExS(2) ||
+                           irq_status & CRUnINTS2_FExS(3))
                                dev_dbg(cru->dev, "IRQ while state stopping\n");
                        return IRQ_HANDLED;
                }