--- /dev/null
+From 657833a74f532262d415fa2ca354b69f4a97353c Mon Sep 17 00:00:00 2001
+From: Luo Jie <quic_luoj@quicinc.com>
+Date: Thu, 23 Nov 2023 15:41:20 +0800
+Subject: [PATCH] arm64: dts: qcom: Add IPQ9574 MDIO device node
+
+The MDIO bus master block is used to accessing the MDIO slave
+device (such as PHY device), the dedicated MDIO PINs needs to
+be configured.
+
+Change-Id: Ia64083529e693256dbd8f8af4071c02afdded8f9
+Signed-off-by: Luo Jie <quic_luoj@quicinc.com>
+---
+ arch/arm64/boot/dts/qcom/ipq9574.dtsi | 18 ++++++++++++++++++
+ 1 file changed, 18 insertions(+)
+
+--- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi
++++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
+@@ -295,6 +295,8 @@
+ mdio: mdio@90000 {
+ compatible = "qcom,ipq9574-mdio", "qcom,ipq4019-mdio";
+ reg = <0x00090000 0x64>;
++ pinctrl-0 = <&mdio_pins>;
++ pinctrl-names = "default";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&gcc GCC_MDIO_AHB_CLK>;
+@@ -412,6 +414,22 @@
+ interrupt-controller;
+ #interrupt-cells = <2>;
+
++ mdio_pins: mdio-pins {
++ mdc-state {
++ pins = "gpio38";
++ function = "mdc";
++ drive-strength = <8>;
++ bias-disable;
++ };
++
++ mdio-state {
++ pins = "gpio39";
++ function = "mdio";
++ drive-strength = <8>;
++ bias-pull-up;
++ };
++ };
++
+ uart2_pins: uart2-state {
+ pins = "gpio34", "gpio35";
+ function = "blsp2_uart";
--- /dev/null
+From 91467ca0db1654644b2168f882f223d47dcfb9c1 Mon Sep 17 00:00:00 2001
+From: Alexandru Gagniuc <mr.nuke.me@gmail.com>
+Date: Sat, 30 Mar 2024 20:03:30 -0500
+Subject: [PATCH] arm64: dts: qcom: ipq9574: Use 'usb-phy' for node names
+
+The devicetree spec allows node names of "usb-phy". So be more
+specific for the USB PHYs, and name the nodes "usb-phy" instead of
+just "phy".
+
+Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
+---
+ arch/arm64/boot/dts/qcom/ipq9574.dtsi | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi
++++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
+@@ -718,7 +718,7 @@
+ status = "disabled";
+ };
+
+- usb_0_qusbphy: phy@7b000 {
++ usb_0_qusbphy: usb-phy@7b000 {
+ compatible = "qcom,ipq9574-qusb2-phy";
+ reg = <0x0007b000 0x180>;
+ #phy-cells = <0>;
+@@ -732,7 +732,7 @@
+ status = "disabled";
+ };
+
+- usb_0_qmpphy: phy@7d000 {
++ usb_0_qmpphy: usb-phy@7d000 {
+ compatible = "qcom,ipq9574-qmp-usb3-phy";
+ reg = <0x0007d000 0xa00>;
+ #phy-cells = <0>;
--- /dev/null
+From be44d0251a2540f3b8d7205e0bc6659704366711 Mon Sep 17 00:00:00 2001
+From: Christian Marangi <ansuelsmth@gmail.com>
+Date: Thu, 30 Jan 2025 00:39:30 +0100
+Subject: [PATCH] arm64: dts: qcom: ipq9574: add QPIC SPI NAND default
+ partition nodes
+
+Add QPIC SPI NAND default partition nodes for RDP reference board.
+
+Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
+---
+ .../boot/dts/qcom/ipq9574-rdp-common.dtsi | 28 +++++++++++++++++++
+ 1 file changed, 28 insertions(+)
+
+--- a/arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi
++++ b/arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi
+@@ -189,6 +189,34 @@
+ nand-ecc-engine = <&qpic_nand>;
+ nand-ecc-strength = <4>;
+ nand-ecc-step-size = <512>;
++
++ partitions {
++ compatible = "fixed-partitions";
++ #address-cells = <1>;
++ #size-cells = <1>;
++
++ partition@0 {
++ label = "0:training";
++ reg = <0x0 0x80000>;
++ read-only;
++ };
++
++ partition@80000 {
++ label = "0:license";
++ reg = <0x80000 0x40000>;
++ read-only;
++ };
++
++ partition@c0000 {
++ label = "rootfs";
++ reg = <0xc0000 0x3c00000>;
++ };
++
++ partition@3cc0000 {
++ label = "rootfs_1";
++ reg = <0x3cc0000 0x3c00000>;
++ };
++ };
+ };
+ };
+
--- /dev/null
+From 47c7ae9715d76054d98e8407dbb8ca1cf42fd587 Mon Sep 17 00:00:00 2001
+From: Christian Marangi <ansuelsmth@gmail.com>
+Date: Mon, 9 Dec 2024 17:50:31 +0100
+Subject: [PATCH] arm64: dts: qcom: add partition table for ipq9574 rdp common
+
+Add partition table for ipq9574 SoC common to every RDB board.
+
+Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
+---
+ .../boot/dts/qcom/ipq9574-rdp-common.dtsi | 146 +++++++++++++++++-
+ 1 file changed, 145 insertions(+), 1 deletion(-)
+
+--- a/arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi
++++ b/arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi
+@@ -74,11 +74,155 @@
+ status = "okay";
+
+ flash@0 {
+- compatible = "micron,n25q128a11", "jedec,spi-nor";
++ compatible = "jedec,spi-nor";
+ reg = <0>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ spi-max-frequency = <50000000>;
++
++ partitions {
++ compatible = "fixed-partitions";
++ #address-cells = <1>;
++ #size-cells = <1>;
++
++ partition@0 {
++ label = "0:sbl1";
++ reg = <0x0 0xc0000>;
++ read-only;
++ };
++
++ partition@c0000 {
++ label = "0:mibib";
++ reg = <0xc0000 0x10000>;
++ read-only;
++ };
++
++ partition@d0000 {
++ label = "0:bootconfig";
++ reg = <0xd0000 0x20000>;
++ read-only;
++ };
++
++ partition@f0000 {
++ label = "0:bootconfig1";
++ reg = <0xf0000 0x20000>;
++ read-only;
++ };
++
++ partition@110000 {
++ label = "0:qsee";
++ reg = <0x110000 0x180000>;
++ read-only;
++ };
++
++ partition@290000 {
++ label = "0:qsee_1";
++ reg = <0x290000 0x180000>;
++ read-only;
++ };
++
++ partition@410000 {
++ label = "0:devcfg";
++ reg = <0x410000 0x10000>;
++ read-only;
++ };
++
++ partition@420000 {
++ label = "0:devcfg_1";
++ reg = <0x420000 0x10000>;
++ read-only;
++ };
++
++ partition@430000 {
++ label = "0:apdp";
++ reg = <0x430000 0x10000>;
++ read-only;
++ };
++
++ partition@440000 {
++ label = "0:apdp_1";
++ reg = <0x440000 0x10000>;
++ read-only;
++ };
++
++ partition@450000 {
++ label = "0:tme";
++ reg = <0x450000 0x40000>;
++ read-only;
++ };
++
++ partition@490000 {
++ label = "0:tme_1";
++ reg = <0x490000 0x40000>;
++ read-only;
++ };
++
++ partition@4d0000 {
++ label = "0:rpm";
++ reg = <0x4d0000 0x20000>;
++ read-only;
++ };
++
++ partition@4f0000 {
++ label = "0:rpm_1";
++ reg = <0x4f0000 0x20000>;
++ read-only;
++ };
++
++ partition@510000 {
++ label = "0:cdt";
++ reg = <0x510000 0x10000>;
++ read-only;
++ };
++
++ partition@520000 {
++ label = "0:cdt_1";
++ reg = <0x520000 0x10000>;
++ read-only;
++ };
++
++ partition@530000 {
++ compatible = "u-boot,env";
++ label = "0:appsblenv";
++ reg = <0x530000 0x10000>;
++
++ macaddr_lan: ethaddr {
++ #nvmem-cell-cells = <1>;
++ };
++ };
++
++ partition@540000 {
++ label = "0:appsbl";
++ reg = <0x540000 0xa0000>;
++ read-only;
++ };
++
++ partition@5e0000 {
++ label = "0:appsbl_1";
++ reg = <0x5e0000 0xa0000>;
++ read-only;
++ };
++
++ partition@680000 {
++ label = "0:art";
++ reg = <0x680000 0x100000>;
++ read-only;
++ };
++
++ partition@780000 {
++ label = "0:ethphyfw";
++ reg = <0x780000 0x80000>;
++ read-only;
++
++ nvmem-layout {
++ compatible = "fixed-layout";
++
++ aqr_fw: aqr-fw@0 {
++ reg = <0x0 0x5fc02>;
++ };
++ };
++ };
++ };
+ };
+ };
+
projects / thirdparty / openwrt.git / commitdiff
