]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
drm/i915/cdclk: Do cdclk post plane programming later
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Tue, 18 Feb 2025 21:18:55 +0000 (23:18 +0200)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Sat, 22 Mar 2025 19:54:23 +0000 (12:54 -0700)
commit 6266f4a78131c795631440ea9c7b66cdfd399484 upstream.

We currently call intel_set_cdclk_post_plane_update() far
too early. When pipes are active during the reprogramming
the current spot only works for the cd2x divider update
case, as that is synchronize to the pipe's vblank. Squashing
and crawling are not synchronized in any way, so doing the
programming while the pipes/planes are potentially still using
the old hardware state could lead to underruns.

Move the post plane reprgramming to a spot where we know
that the pipes/planes have switched over the new hardware
state.

Cc: stable@vger.kernel.org
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250218211913.27867-2-ville.syrjala@linux.intel.com
Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
(cherry picked from commit fb64f5568c0e0b5730733d70a012ae26b1a55815)
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/gpu/drm/i915/display/intel_display.c

index 3039ee03e1c7a8be1a14d8bfcc04b0db548f08ff..d5eb8de645a9a321d98424b00e52f6fa55bd607f 100644 (file)
@@ -7438,9 +7438,6 @@ static void intel_atomic_commit_tail(struct intel_atomic_state *state)
        /* Now enable the clocks, plane, pipe, and connectors that we set up. */
        dev_priv->display.funcs.display->commit_modeset_enables(state);
 
-       if (state->modeset)
-               intel_set_cdclk_post_plane_update(state);
-
        intel_wait_for_vblank_workers(state);
 
        /* FIXME: We should call drm_atomic_helper_commit_hw_done() here
@@ -7521,6 +7518,8 @@ static void intel_atomic_commit_tail(struct intel_atomic_state *state)
                intel_verify_planes(state);
 
        intel_sagv_post_plane_update(state);
+       if (state->modeset)
+               intel_set_cdclk_post_plane_update(state);
        intel_pmdemand_post_plane_update(state);
 
        drm_atomic_helper_commit_hw_done(&state->base);