gcc:
PR target/120995
* config/riscv/sync.md (zacas_atomic_cas_value_strong<mode>):
Allow op3 to be zero.
gcc/testsuite:
PR target/120995
* gcc.target/riscv/amo/zabha-zacas-atomic-cas.c: New test.
(cherry picked from commit
3fd638a9e5497dfdf00f1783d6e704af03fb44b0)
(match_operand:SHORT 1 "memory_operand" "+A")) ;; memory
(set (match_dup 1)
(unspec_volatile:SHORT [(match_operand:SHORT 2 "register_operand" "0") ;; expected_val
- (match_operand:SHORT 3 "register_operand" "rJ") ;; desired_val
+ (match_operand:SHORT 3 "reg_or_0_operand" "rJ") ;; desired_val
(match_operand:SI 4 "const_int_operand") ;; mod_s
(match_operand:SI 5 "const_int_operand")] ;; mod_f
UNSPEC_COMPARE_AND_SWAP))]
--- /dev/null
+/* { dg-do compile } */
+/* PR target/120995 ICE unrecognized subword atomic cas */
+/* { dg-options "-O" } */
+/* { dg-add-options riscv_zacas } */
+/* { dg-add-options riscv_zabha } */
+
+_Bool b;
+void atomic_bool_cmpxchg()
+{
+ __sync_bool_compare_and_swap(&b, 1, 0);
+}