]> git.ipfire.org Git - thirdparty/gcc.git/commitdiff
Add combine splitter to transform vashr/vlshr/vashl_optab to ashr/lshr/ashl_optab...
authorHaochen Jiang <haochen.jiang@intel.com>
Wed, 1 Dec 2021 08:48:28 +0000 (16:48 +0800)
committerliuhongt <hongtao.liu@intel.com>
Wed, 15 Dec 2021 08:26:14 +0000 (16:26 +0800)
gcc/ChangeLog:

PR target/101796
* config/i386/predicates.md (const_vector_operand):
Add new predicate.
* config/i386/sse.md(<insn><mode>3<mask_name>):
Add new define_split below.

gcc/testsuite/ChangeLog:

PR target/101796
* gcc.target/i386/pr101796-1.c: New test.

gcc/config/i386/predicates.md
gcc/config/i386/sse.md
gcc/testsuite/gcc.target/i386/pr101796-1.c [new file with mode: 0755]

index 4ccbe11b8423d5f57ce840297e0d9c129cd53881..770e2f0c0dd8fafe5a6fc20ee26537674a290050 100644 (file)
   return true;
 })
 
+;; Return true if OP is a const vector with duplicate value.
+(define_predicate "const_vector_duplicate_operand"
+  (match_code "const_vector")
+{
+  rtx elt = XVECEXP (op, 0, 0);
+  int i, nelt = XVECLEN (op, 0);
+
+  for (i = 1; i < nelt; ++i)
+    if (!rtx_equal_p (elt, XVECEXP (op, 0, i)))
+      return false;
+  return true;
+})
+
 ;; Return true if OP is a parallel for a vbroadcast permute.
 (define_predicate "avx_vbroadcast_operand"
   (and (match_code "parallel")
index 929eef54055d27b70c5389294b090fbbaa2f217e..768a93ed1c17110027f643d199e9845bf8082d24 100644 (file)
        (const_string "0")))
    (set_attr "mode" "<sseinsnmode>")])
 
+;; PR target/101796: Transfrom movl+vpbranchcastw+vpsravw to vpsraw
+;; when COUNT is immediate.
+(define_split
+  [(set (match_operand:VI248_AVX512BW 0 "register_operand")
+       (any_shift:VI248_AVX512BW
+         (match_operand:VI248_AVX512BW 1 "nonimmediate_operand")
+         (match_operand:VI248_AVX512BW 2 "const_vector_duplicate_operand")))]
+  "TARGET_AVX512F && GET_MODE_UNIT_BITSIZE (<MODE>mode)
+   > INTVAL (XVECEXP (operands[2], 0, 0))"
+  [(set (match_dup 0)
+       (any_shift:VI248_AVX512BW
+         (match_dup 1)
+         (match_dup 3)))]
+  "operands[3] = XVECEXP (operands[2], 0, 0);")
 
 (define_expand "vec_shl_<mode>"
   [(set (match_dup 3)
diff --git a/gcc/testsuite/gcc.target/i386/pr101796-1.c b/gcc/testsuite/gcc.target/i386/pr101796-1.c
new file mode 100755 (executable)
index 0000000..3a5f50d
--- /dev/null
@@ -0,0 +1,20 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mavx512bw" } */
+/* { dg-final {scan-assembler-times "vpsrlw\[ \\t\]" 1 } } */
+/* { dg-final {scan-assembler-times "vpsllw\[ \\t\]" 1 } } */
+/* { dg-final {scan-assembler-times "vpsraw\[ \\t\]" 1 } } */
+/* { dg-final {scan-assembler-not "vpbroadcastw\[ \\t\]" } } */
+/* { dg-final {scan-assembler-not "vpsrlvw\[ \\t\]" } } */
+/* { dg-final {scan-assembler-not "vpsllvw\[ \\t\]" } } */
+/* { dg-final {scan-assembler-not "vpsravw\[ \\t\]" } } */
+#include <immintrin.h>
+
+volatile __m512i a, b;
+
+void
+foo()
+{
+  b = _mm512_srlv_epi16 (a, _mm512_set1_epi16 (3));
+  b = _mm512_sllv_epi16 (a, _mm512_set1_epi16 (4));
+  b = _mm512_srav_epi16 (a, _mm512_set1_epi16 (5));
+}