]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
dmaengine: dw-edma: Add spinlock to protect DONE_INT_MASK and ABORT_INT_MASK
authorFrank Li <Frank.Li@nxp.com>
Thu, 21 May 2026 14:21:53 +0000 (23:21 +0900)
committerVinod Koul <vkoul@kernel.org>
Mon, 8 Jun 2026 11:32:21 +0000 (17:02 +0530)
The DONE_INT_MASK and ABORT_INT_MASK registers are shared by all DMA
channels, and modifying them requires a read-modify-write sequence.
Because this operation is not atomic, concurrent calls to
dw_edma_v0_core_start() can introduce race conditions if two channels
update these registers simultaneously.

Add a spinlock to serialize access to these registers and prevent race
conditions.

Fixes: 7e4b8a4fbe2c ("dmaengine: Add Synopsys eDMA IP version 0 support")
Cc: stable@vger.kernel.org
Signed-off-by: Frank Li <Frank.Li@nxp.com>
[den: update dw_edma.lock comment]
Link: https://lore.kernel.org/dmaengine/20260109-edma_ll-v2-1-5c0b27b2c664@nxp.com/
Signed-off-by: Koichiro Den <den@valinux.co.jp>
Link: https://patch.msgid.link/20260521142153.2957432-5-den@valinux.co.jp
Signed-off-by: Vinod Koul <vkoul@kernel.org>
drivers/dma/dw-edma/dw-edma-core.h
drivers/dma/dw-edma/dw-edma-v0-core.c

index 902574b1ba86798d6eb9815321014404ccfa068a..6474cacf71953203909ad45523f82e0ce588dbbb 100644 (file)
@@ -109,7 +109,7 @@ struct dw_edma {
 
        struct dw_edma_chan             *chan;
 
-       raw_spinlock_t                  lock;           /* Only for legacy */
+       raw_spinlock_t                  lock;           /* Protect v0 shared registers */
 
        struct dw_edma_chip             *chip;
 
index 69e8279adec81ad940cfe6fcb422adc2017d7f58..cfdd6463252e6563ed1014665fe4c2d64cf2c605 100644 (file)
@@ -364,6 +364,7 @@ static void dw_edma_v0_core_start(struct dw_edma_chunk *chunk, bool first)
 {
        struct dw_edma_chan *chan = chunk->chan;
        struct dw_edma *dw = chan->dw;
+       unsigned long flags;
        u32 tmp;
 
        dw_edma_v0_core_write_chunk(chunk);
@@ -408,6 +409,8 @@ static void dw_edma_v0_core_start(struct dw_edma_chunk *chunk, bool first)
                        }
                }
                /* Interrupt unmask - done, abort */
+               raw_spin_lock_irqsave(&dw->lock, flags);
+
                tmp = GET_RW_32(dw, chan->dir, int_mask);
                tmp &= ~FIELD_PREP(EDMA_V0_DONE_INT_MASK, BIT(chan->id));
                tmp &= ~FIELD_PREP(EDMA_V0_ABORT_INT_MASK, BIT(chan->id));
@@ -416,6 +419,9 @@ static void dw_edma_v0_core_start(struct dw_edma_chunk *chunk, bool first)
                tmp = GET_RW_32(dw, chan->dir, linked_list_err_en);
                tmp |= FIELD_PREP(EDMA_V0_LINKED_LIST_ERR_MASK, BIT(chan->id));
                SET_RW_32(dw, chan->dir, linked_list_err_en, tmp);
+
+               raw_spin_unlock_irqrestore(&dw->lock, flags);
+
                /* Channel control */
                SET_CH_32(dw, chan->dir, chan->id, ch_control1,
                          (DW_EDMA_V0_CCS | DW_EDMA_V0_LLE));