Remove 4 tests of the pextrw instruction.

Those tests were rejected by clang and according to the
analysis below by Tom Hughes do not add anything new.

Analysis:

I'm not 100% sure that clang is right though - the Intel manual
clearly describes that argument as "reg" rather than "r32" which
is why I will have included the 64 bit version in the test. It also says:

  "The upper bits of r32 or r64 is zeroed."

and:

  "If the destination operand is a general-purpose register, the
   default operand size is 64-bits in 64-bit mode."

which basically means that REX.W is implied for this op and there is
no way to encode a 32 bit version when running in 64 bit mode.

So in principle you could encode it as:

  44 0f c5 ce 00          pextrw $0x0,%mm6,%r9d

or:

  4c 0f c5 ce 00          pextrw $0x0,%mm6,%r9

but in fact gcc assembles both versions to the first form.

Equally you could argue that as REX.W is implied both versions
should disassemble as %r9.

So I think clang is being overly picky, and if it was only going to
accept one version I would argue it should be %r9 not %r9d!

In practical terms dropping the second set of tests doesn't lose us anything though.

git-svn-id: svn://svn.valgrind.org/valgrind/trunk@13614

diff --git a/none/tests/amd64/insn_sse.def b/none/tests/amd64/insn_sse.def
index a7fe4cd5a4d5815805c9ec7f3b38123f378b0ddc..a9e92a0af1b69f9cc0faf323efcdd30aeea193fb 100644 (file)
--- a/none/tests/amd64/insn_sse.def
+++ b/none/tests/amd64/insn_sse.def
@@ -98,10 +98,6 @@ pextrw imm8[0] mm.uw[1234,5678,4321,8765] r32.ud[0xffffffff] => 2.ud[1234]
 pextrw imm8[1] mm.uw[1234,5678,4321,8765] r32.ud[0xffffffff] => 2.ud[5678]
 pextrw imm8[2] mm.uw[1234,5678,4321,8765] r32.ud[0xffffffff] => 2.ud[4321]
 pextrw imm8[3] mm.uw[1234,5678,4321,8765] r32.ud[0xffffffff] => 2.ud[8765]
-pextrw imm8[0] mm.uw[1234,5678,4321,8765] r64.ud[0xffffffff,0xffffffff] => 2.ud[1234,0]
-pextrw imm8[1] mm.uw[1234,5678,4321,8765] r64.ud[0xffffffff,0xffffffff] => 2.ud[5678,0]
-pextrw imm8[2] mm.uw[1234,5678,4321,8765] r64.ud[0xffffffff,0xffffffff] => 2.ud[4321,0]
-pextrw imm8[3] mm.uw[1234,5678,4321,8765] r64.ud[0xffffffff,0xffffffff] => 2.ud[8765,0]
 pinsrw imm8[0] r32.ud[0xffffffff] mm.uw[1234,5678,4321,8765] => 2.uw[65535,5678,4321,8765]
 pinsrw imm8[1] r32.ud[0xffffffff] mm.uw[1234,5678,4321,8765] => 2.uw[1234,65535,4321,8765]
 pinsrw imm8[2] r32.ud[0xffffffff] mm.uw[1234,5678,4321,8765] => 2.uw[1234,5678,65535,8765]