mips32/mips64: tests for FCSR.

Change the existing tests to print the value of the FCSR
register after the mips fpu instruction is executed.
Add tests that are testing the value of FCSR register.

git-svn-id: svn://svn.valgrind.org/valgrind/trunk@13560

diff --git a/none/tests/mips32/Makefile.am b/none/tests/mips32/Makefile.am
index ebf53c775a00295f17ae0cf8993a101e28e6ede1..bf72c85a98d3d656a47d54f0629f72a6b04651dc 100644 (file)
--- a/none/tests/mips32/Makefile.am
+++ b/none/tests/mips32/Makefile.am
@@ -30,7 +30,8 @@ EXTRA_DIST = \
        mips32_dspr2.stdout.exp mips32_dspr2.stderr.exp \
        mips32_dspr2.stdout.exp-mips32 mips32_dspr2.vgtest \
        unaligned_load_store.stdout.exp-LE unaligned_load_store.stdout.exp-BE \
-       unaligned_load_store.stderr.exp unaligned_load_store.vgtest
+       unaligned_load_store.stderr.exp unaligned_load_store.vgtest \
+       test_fcsr.stdout.exp test_fcsr.stderr.exp test_fcsr.vgtest
 
 check_PROGRAMS = \
        allexec \
@@ -48,7 +49,8 @@ check_PROGRAMS = \
        bug320057-mips32 \
        mips32_dsp \
        mips32_dspr2 \
-       unaligned_load_store
+       unaligned_load_store \
+       test_fcsr
 
 AM_CFLAGS    += @FLAG_M32@
 AM_CXXFLAGS  += @FLAG_M32@

diff --git a/none/tests/mips32/round.c b/none/tests/mips32/round.c
index 270ea6dd5a831ba89cda331e390fe499777e52b3..a50b986ef1ee7b75695969940831ba9dc5bdcb79 100644 (file)
--- a/none/tests/mips32/round.c
+++ b/none/tests/mips32/round.c
@@ -58,137 +58,154 @@ const int fs_w[] = {
    -347856, 0x80000000, 0xFFFFFFF, 23,
 };
 
-#define BINOP(op) \
-        __asm__ volatile( \
-                                       op" %0, %1, %2\n\t" \
-                                       : "=f"(fd) : "f"(f) , "f"(fB));
+#define BINOP(op)                                   \
+        __asm__ volatile(op"   %1, %2, %3"  "\n\t"  \
+                         "cfc1 %0, $31"     "\n\t"  \
+                         : "=r" (fcsr), "=f"(fd)    \
+                         : "f"(f) , "f"(fB));
 
-#define UNOPdd(op) \
-        fd_d = 0;  \
-        __asm__ volatile( \
-                                       op" %0, %1\n\t" \
-                                       : "=f"(fd_d) : "f"(fs_d[i]));
+#define UNOPdd(op)                                  \
+        fd_d = 0;                                   \
+        __asm__ volatile(op"   %1, %2"      "\n\t"  \
+                         "cfc1 %0, $31"     "\n\t"  \
+                         : "=r" (fcsr), "=f"(fd_d)  \
+                         : "f"(fs_d[i]));
 
-#define UNOPff(op) \
-        fd_f = 0;  \
-        __asm__ volatile( \
-                                       op" %0, %1\n\t" \
-                                       : "=f"(fd_f) : "f"(fs_f[i]));
+#define UNOPff(op)                                  \
+        fd_f = 0;                                   \
+        __asm__ volatile(op" %1, %2"        "\n\t"  \
+                         "cfc1 %0, $31"     "\n\t"  \
+                         : "=r" (fcsr), "=f"(fd_f)  \
+                         : "f"(fs_f[i]));
 
-#define UNOPfd(op) \
-        fd_d = 0;  \
-        __asm__ volatile( \
-                                       op" %0, %1\n\t" \
-                                       : "=f"(fd_d) : "f"(fs_f[i]));
+#define UNOPfd(op)                                  \
+        fd_d = 0;                                   \
+        __asm__ volatile(op"   %1, %2"   "\n\t"     \
+                         "cfc1 %0, $31"  "\n\t"     \
+                         : "=r" (fcsr), "=f"(fd_d)  \
+                         : "f"(fs_f[i]));
 
-#define UNOPdf(op) \
-        fd_f = 0;  \
-        __asm__ volatile( \
-                                       op" %0, %1\n\t" \
-                                       : "=f"(fd_f) : "f"(fs_d[i]));
+#define UNOPdf(op)                                  \
+        fd_f = 0;                                   \
+        __asm__ volatile(op"   %1, %2"   "\n\t"     \
+                         "cfc1 %0, $31"  "\n\t"     \
+                         : "=r" (fcsr), "=f"(fd_f)  \
+                         : "f"(fs_d[i]));
 
-#define UNOPfw(op) \
-        fd_w = 0;  \
-        __asm__ volatile( \
-                                       op" $f0, %1\n\t" \
-                                       "mfc1 %0, $f0\n\t" \
-                                       : "=r"(fd_w) : "f"(fs_f[i]) \
-                                       : "$f0");
+#define UNOPfw(op)                                  \
+        fd_w = 0;                                   \
+        __asm__ volatile(op"   $f0, %2"   "\n\t"    \
+                         "mfc1 %1,  $f0"  "\n\t"    \
+                         "cfc1 %0, $31"   "\n\t"    \
+                         : "=r" (fcsr), "=r"(fd_w)  \
+                         : "f"(fs_f[i])             \
+                         : "$f0");
 
-#define UNOPdw(op) \
-        fd_w = 0;  \
-        __asm__ volatile( \
-                                       op" $f0, %1\n\t" \
-                                       "mfc1 %0, $f0\n\t" \
-                                       : "=r"(fd_w) : "f"(fs_d[i]) \
-                                       : "$f0");
+#define UNOPdw(op)                                  \
+        fd_w = 0;                                   \
+        __asm__ volatile(op" $f0, %2"    "\n\t"     \
+                         "mfc1 %1, $f0"  "\n\t"     \
+                         "cfc1 %0, $31"  "\n\t"     \
+                         : "=r" (fcsr), "=r"(fd_w)  \
+                         : "f"(fs_d[i])             \
+                         : "$f0");
 
-#define UNOPwd(op) \
-        fd_d = 0;  \
-        __asm__ volatile( \
-                    "mtc1 %1, $f0\n\t" \
-                                       op" %0, $f0\n\t" \
-                                       : "=f"(fd_d) : "r"(fs_w[i]) \
-                                       : "$f0", "$f1");
+#define UNOPwd(op)                                  \
+        fd_d = 0;                                   \
+        __asm__ volatile("mtc1 %2, $f0"  "\n\t"     \
+                         op"   %1, $f0"  "\n\t"     \
+                         "cfc1 %0, $31"  "\n\t"     \
+                         : "=r" (fcsr), "=f"(fd_d)  \
+                         : "r"(fs_w[i])             \
+                         : "$f0", "$f1");
 
-#define UNOPwf(op) \
-        fd_f = 0;  \
-        __asm__ volatile( \
-                    "mtc1 %1, $f0\n\t" \
-                                       op" %0, $f0\n\t" \
-                                       : "=f"(fd_f) : "r"(fs_w[i]) \
-                                       : "$f0");
+#define UNOPwf(op)                                  \
+        fd_f = 0;                                   \
+        __asm__ volatile("mtc1 %2, $f0"  "\n\t"     \
+                         op"   %1, $f0"  "\n\t"     \
+                         "cfc1 %0, $31"  "\n\t"     \
+                         : "=r" (fcsr), "=f"(fd_f)  \
+                         : "r"(fs_w[i])             \
+                         : "$f0");
 
 void set_rounding_mode(round_mode_t mode)
 {
-       switch(mode) {
-       case TO_NEAREST:
-               __asm__ volatile("cfc1 $t0, $31\n\t"
-                            "srl $t0, 2\n\t"
-                            "sll $t0, 2\n\t"
-                            "ctc1 $t0, $31\n\t");
-                            
-               break;
-       case TO_ZERO:
-               __asm__ volatile("cfc1 $t0, $31\n\t"
-                            "srl $t0, 2\n\t"
-                            "sll $t0, 2\n\t"
-                            "addiu $t0, 1\n\t"
-                            "ctc1 $t0, $31\n\t");
-               break;
-       case TO_PLUS_INFINITY:
-               __asm__ volatile("cfc1 $t0, $31\n\t"
-                            "srl $t0, 2\n\t"
-                            "sll $t0, 2\n\t"
-                            "addiu $t0, 2\n\t"
-                            "ctc1 $t0, $31\n\t");
-               break;
-       case TO_MINUS_INFINITY:
-               __asm__ volatile("cfc1 $t0, $31\n\t"
-                            "srl $t0, 2\n\t"
-                            "sll $t0, 2\n\t"
-                            "addiu $t0, 3\n\t"
-                            "ctc1 $t0, $31\n\t");
-               break;
-       }
+   switch(mode) {
+      case TO_NEAREST:
+         __asm__ volatile("cfc1 $t0, $31\n\t"
+                          "srl $t0, 2\n\t"
+                          "sll $t0, 2\n\t"
+                          "ctc1 $t0, $31\n\t");
+         break;
+      case TO_ZERO:
+         __asm__ volatile("cfc1 $t0, $31\n\t"
+                          "srl $t0, 2\n\t"
+                          "sll $t0, 2\n\t"
+                          "addiu $t0, 1\n\t"
+                          "ctc1 $t0, $31\n\t");
+         break;
+      case TO_PLUS_INFINITY:
+         __asm__ volatile("cfc1 $t0, $31\n\t"
+                          "srl $t0, 2\n\t"
+                          "sll $t0, 2\n\t"
+                          "addiu $t0, 2\n\t"
+                          "ctc1 $t0, $31\n\t");
+         break;
+      case TO_MINUS_INFINITY:
+         __asm__ volatile("cfc1 $t0, $31\n\t"
+                          "srl $t0, 2\n\t"
+                          "sll $t0, 2\n\t"
+                          "addiu $t0, 3\n\t"
+                          "ctc1 $t0, $31\n\t");
+         break;
+   }
 }
 
 int directedRoundingMode(flt_dir_op_t op) {
    int fd_w = 0;
    int i;
+   int fcsr = 0;
    for (i = 0; i < 24; i++) {
       switch(op) {
          case CEILWS:
               UNOPfw("ceil.w.s");
               printf("%s %d %f\n", flt_dir_op_names[op], fd_w, fs_f[i]);
+              printf("fcsr: 0x%x\n", fcsr);
               break;
          case CEILWD:
               UNOPdw("ceil.w.d");
               printf("%s %d %lf\n", flt_dir_op_names[op], fd_w, fs_d[i]);
+              printf("fcsr: 0x%x\n", fcsr);
               break;
          case FLOORWS:
               UNOPfw("floor.w.s");
               printf("%s %d %f\n", flt_dir_op_names[op], fd_w, fs_f[i]);
+              printf("fcsr: 0x%x\n", fcsr);
               break;
          case FLOORWD:
               UNOPdw("floor.w.d");
               printf("%s %d %lf\n", flt_dir_op_names[op], fd_w, fs_d[i]);
+              printf("fcsr: 0x%x\n", fcsr);
               break;
          case ROUNDWS:
               UNOPfw("round.w.s");
               printf("%s %d %f\n", flt_dir_op_names[op], fd_w, fs_f[i]);
+              printf("fcsr: 0x%x\n", fcsr);
               break;
          case ROUNDWD:
               UNOPdw("round.w.d");
               printf("%s %d %lf\n", flt_dir_op_names[op], fd_w, fs_d[i]);
+              printf("fcsr: 0x%x\n", fcsr);
               break;
          case TRUNCWS:
               UNOPfw("trunc.w.s");
               printf("%s %d %f\n", flt_dir_op_names[op], fd_w, fs_f[i]);
+              printf("fcsr: 0x%x\n", fcsr);
               break;
          case TRUNCWD:
               UNOPdw("trunc.w.d");
               printf("%s %d %lf\n", flt_dir_op_names[op], fd_w, fs_d[i]);
+              printf("fcsr: 0x%x\n", fcsr);
               break;
         default:
             printf("error\n");
@@ -204,38 +221,43 @@ int FCSRRoundingMode(flt_round_op_t op1)
    float fd_f = 0;
    int fd_w = 0;
    int i;
+   int fcsr = 0;
    round_mode_t rm;
-   for (rm = TO_NEAREST; rm <= TO_MINUS_INFINITY; rm ++)
-   { 
+   for (rm = TO_NEAREST; rm <= TO_MINUS_INFINITY; rm ++) { 
       set_rounding_mode(rm);
       printf("roundig mode: %s\n", round_mode_name[rm]);
-      for (i = 0; i < 24; i++)
-      {
+      for (i = 0; i < 24; i++) {
          set_rounding_mode(rm);
          switch(op1) {
             case CVTDS:
                  UNOPfd("cvt.d.s");
                  printf("%s %lf %lf\n", flt_round_op_names[op1], fd_d, fs_f[i]);
+                 printf("fcsr: 0x%x\n", fcsr);
                  break;
             case CVTDW:
                  UNOPwd("cvt.d.w");
                  printf("%s %lf %d\n", flt_round_op_names[op1], fd_d, fs_w[i]);
+                 printf("fcsr: 0x%x\n", fcsr);
                  break;
             case CVTSD:
                  UNOPdf("cvt.s.d");
                  printf("%s %f %lf\n", flt_round_op_names[op1], fd_f, fs_d[i]);
+                 printf("fcsr: 0x%x\n", fcsr);
                  break;
             case CVTSW:
                  UNOPwf("cvt.s.w");
                  printf("%s %f %d\n", flt_round_op_names[op1], fd_f, fs_w[i]);
+                 printf("fcsr: 0x%x\n", fcsr);
                  break;
             case CVTWS:
                  UNOPfw("cvt.w.s");
                  printf("%s %d %f\n", flt_round_op_names[op1], fd_w, fs_f[i]);
+                 printf("fcsr: 0x%x\n", fcsr);
                  break;
             case CVTWD:
                  UNOPdw("cvt.w.d");
                  printf("%s %d %lf\n", flt_round_op_names[op1], fd_w, fs_d[i]);
+                 printf("fcsr: 0x%x\n", fcsr);
                  break;
             default:
                  printf("error\n");

diff --git a/none/tests/mips32/round.stdout.exp b/none/tests/mips32/round.stdout.exp
index 0a3d655cff39758cd0267ef4ce1c1a73bd10d3a6..cbe20d784a3b5e96232cb30be3d72922ae2a0ce8 100644 (file)
--- a/none/tests/mips32/round.stdout.exp
+++ b/none/tests/mips32/round.stdout.exp
@@ -1,794 +1,1562 @@
 -------------------------- test FPU Conversion Operations Using a Directed Rounding Mode --------------------------
 ceil.w.s 0 0.000000
+fcsr: 0x0
 ceil.w.s 457 456.248962
+fcsr: 0x1004
 ceil.w.s 3 3.000000
+fcsr: 0x4
 ceil.w.s -1 -1.000000
+fcsr: 0x4
 ceil.w.s 1385 1384.599976
+fcsr: 0x1004
 ceil.w.s -7 -7.294568
+fcsr: 0x1004
 ceil.w.s 1000000000 1000000000.000000
+fcsr: 0x4
 ceil.w.s -5786 -5786.470215
+fcsr: 0x1004
 ceil.w.s 1752 1752.000000
+fcsr: 0x4
 ceil.w.s 1 0.002457
+fcsr: 0x1004
 ceil.w.s 1 0.000000
+fcsr: 0x1004
 ceil.w.s -248562 -248562.765625
+fcsr: 0x1004
 ceil.w.s -45786 -45786.476562
+fcsr: 0x1004
 ceil.w.s 457 456.248962
+fcsr: 0x1004
 ceil.w.s 35 34.000462
+fcsr: 0x1004
 ceil.w.s 45787 45786.476562
+fcsr: 0x1004
 ceil.w.s 1752065 1752065.000000
+fcsr: 0x4
 ceil.w.s 107 107.000000
+fcsr: 0x4
 ceil.w.s -45667 -45667.238281
+fcsr: 0x1004
 ceil.w.s -7 -7.294568
+fcsr: 0x1004
 ceil.w.s -347856 -347856.468750
+fcsr: 0x1004
 ceil.w.s 356048 356047.562500
+fcsr: 0x1004
 ceil.w.s -1 -1.000000
+fcsr: 0x4
 ceil.w.s 24 23.040001
+fcsr: 0x1004
 ceil.w.d 0 0.000000
+fcsr: 0x4
 ceil.w.d 457 456.248956
+fcsr: 0x1004
 ceil.w.d 3 3.000000
+fcsr: 0x4
 ceil.w.d -1 -1.000000
+fcsr: 0x4
 ceil.w.d 1385 1384.600000
+fcsr: 0x1004
 ceil.w.d -7 -7.294568
+fcsr: 0x1004
 ceil.w.d 1000000000 1000000000.000000
+fcsr: 0x4
 ceil.w.d -5786 -5786.470000
+fcsr: 0x1004
 ceil.w.d 1752 1752.000000
+fcsr: 0x4
 ceil.w.d 1 0.002458
+fcsr: 0x1004
 ceil.w.d 1 0.000000
+fcsr: 0x1004
 ceil.w.d -248562 -248562.760000
+fcsr: 0x1004
 ceil.w.d -45786 -45786.476000
+fcsr: 0x1004
 ceil.w.d 457 456.248956
+fcsr: 0x1004
 ceil.w.d 35 34.000460
+fcsr: 0x1004
 ceil.w.d 45787 45786.476000
+fcsr: 0x1004
 ceil.w.d 1752065 1752065.000000
+fcsr: 0x4
 ceil.w.d 107 107.000000
+fcsr: 0x4
 ceil.w.d -45667 -45667.240000
+fcsr: 0x1004
 ceil.w.d -7 -7.294568
+fcsr: 0x1004
 ceil.w.d -347856 -347856.475000
+fcsr: 0x1004
 ceil.w.d 356048 356047.560000
+fcsr: 0x1004
 ceil.w.d -1 -1.000000
+fcsr: 0x4
 ceil.w.d 24 23.040000
+fcsr: 0x1004
 floor.w.s 0 0.000000
+fcsr: 0x4
 floor.w.s 456 456.248962
+fcsr: 0x1004
 floor.w.s 3 3.000000
+fcsr: 0x4
 floor.w.s -1 -1.000000
+fcsr: 0x4
 floor.w.s 1384 1384.599976
+fcsr: 0x1004
 floor.w.s -8 -7.294568
+fcsr: 0x1004
 floor.w.s 1000000000 1000000000.000000
+fcsr: 0x4
 floor.w.s -5787 -5786.470215
+fcsr: 0x1004
 floor.w.s 1752 1752.000000
+fcsr: 0x4
 floor.w.s 0 0.002457
+fcsr: 0x1004
 floor.w.s 0 0.000000
+fcsr: 0x1004
 floor.w.s -248563 -248562.765625
+fcsr: 0x1004
 floor.w.s -45787 -45786.476562
+fcsr: 0x1004
 floor.w.s 456 456.248962
+fcsr: 0x1004
 floor.w.s 34 34.000462
+fcsr: 0x1004
 floor.w.s 45786 45786.476562
+fcsr: 0x1004
 floor.w.s 1752065 1752065.000000
+fcsr: 0x4
 floor.w.s 107 107.000000
+fcsr: 0x4
 floor.w.s -45668 -45667.238281
+fcsr: 0x1004
 floor.w.s -8 -7.294568
+fcsr: 0x1004
 floor.w.s -347857 -347856.468750
+fcsr: 0x1004
 floor.w.s 356047 356047.562500
+fcsr: 0x1004
 floor.w.s -1 -1.000000
+fcsr: 0x4
 floor.w.s 23 23.040001
+fcsr: 0x1004
 floor.w.d 0 0.000000
+fcsr: 0x4
 floor.w.d 456 456.248956
+fcsr: 0x1004
 floor.w.d 3 3.000000
+fcsr: 0x4
 floor.w.d -1 -1.000000
+fcsr: 0x4
 floor.w.d 1384 1384.600000
+fcsr: 0x1004
 floor.w.d -8 -7.294568
+fcsr: 0x1004
 floor.w.d 1000000000 1000000000.000000
+fcsr: 0x4
 floor.w.d -5787 -5786.470000
+fcsr: 0x1004
 floor.w.d 1752 1752.000000
+fcsr: 0x4
 floor.w.d 0 0.002458
+fcsr: 0x1004
 floor.w.d 0 0.000000
+fcsr: 0x1004
 floor.w.d -248563 -248562.760000
+fcsr: 0x1004
 floor.w.d -45787 -45786.476000
+fcsr: 0x1004
 floor.w.d 456 456.248956
+fcsr: 0x1004
 floor.w.d 34 34.000460
+fcsr: 0x1004
 floor.w.d 45786 45786.476000
+fcsr: 0x1004
 floor.w.d 1752065 1752065.000000
+fcsr: 0x4
 floor.w.d 107 107.000000
+fcsr: 0x4
 floor.w.d -45668 -45667.240000
+fcsr: 0x1004
 floor.w.d -8 -7.294568
+fcsr: 0x1004
 floor.w.d -347857 -347856.475000
+fcsr: 0x1004
 floor.w.d 356047 356047.560000
+fcsr: 0x1004
 floor.w.d -1 -1.000000
+fcsr: 0x4
 floor.w.d 23 23.040000
+fcsr: 0x1004
 round.w.s 0 0.000000
+fcsr: 0x4
 round.w.s 456 456.248962
+fcsr: 0x1004
 round.w.s 3 3.000000
+fcsr: 0x4
 round.w.s -1 -1.000000
+fcsr: 0x4
 round.w.s 1385 1384.599976
+fcsr: 0x1004
 round.w.s -7 -7.294568
+fcsr: 0x1004
 round.w.s 1000000000 1000000000.000000
+fcsr: 0x4
 round.w.s -5786 -5786.470215
+fcsr: 0x1004
 round.w.s 1752 1752.000000
+fcsr: 0x4
 round.w.s 0 0.002457
+fcsr: 0x1004
 round.w.s 0 0.000000
+fcsr: 0x1004
 round.w.s -248563 -248562.765625
+fcsr: 0x1004
 round.w.s -45786 -45786.476562
+fcsr: 0x1004
 round.w.s 456 456.248962
+fcsr: 0x1004
 round.w.s 34 34.000462
+fcsr: 0x1004
 round.w.s 45786 45786.476562
+fcsr: 0x1004
 round.w.s 1752065 1752065.000000
+fcsr: 0x4
 round.w.s 107 107.000000
+fcsr: 0x4
 round.w.s -45667 -45667.238281
+fcsr: 0x1004
 round.w.s -7 -7.294568
+fcsr: 0x1004
 round.w.s -347856 -347856.468750
+fcsr: 0x1004
 round.w.s 356048 356047.562500
+fcsr: 0x1004
 round.w.s -1 -1.000000
+fcsr: 0x4
 round.w.s 23 23.040001
+fcsr: 0x1004
 round.w.d 0 0.000000
+fcsr: 0x4
 round.w.d 456 456.248956
+fcsr: 0x1004
 round.w.d 3 3.000000
+fcsr: 0x4
 round.w.d -1 -1.000000
+fcsr: 0x4
 round.w.d 1385 1384.600000
+fcsr: 0x1004
 round.w.d -7 -7.294568
+fcsr: 0x1004
 round.w.d 1000000000 1000000000.000000
+fcsr: 0x4
 round.w.d -5786 -5786.470000
+fcsr: 0x1004
 round.w.d 1752 1752.000000
+fcsr: 0x4
 round.w.d 0 0.002458
+fcsr: 0x1004
 round.w.d 0 0.000000
+fcsr: 0x1004
 round.w.d -248563 -248562.760000
+fcsr: 0x1004
 round.w.d -45786 -45786.476000
+fcsr: 0x1004
 round.w.d 456 456.248956
+fcsr: 0x1004
 round.w.d 34 34.000460
+fcsr: 0x1004
 round.w.d 45786 45786.476000
+fcsr: 0x1004
 round.w.d 1752065 1752065.000000
+fcsr: 0x4
 round.w.d 107 107.000000
+fcsr: 0x4
 round.w.d -45667 -45667.240000
+fcsr: 0x1004
 round.w.d -7 -7.294568
+fcsr: 0x1004
 round.w.d -347856 -347856.475000
+fcsr: 0x1004
 round.w.d 356048 356047.560000
+fcsr: 0x1004
 round.w.d -1 -1.000000
+fcsr: 0x4
 round.w.d 23 23.040000
+fcsr: 0x1004
 trunc.w.s 0 0.000000
+fcsr: 0x4
 trunc.w.s 456 456.248962
+fcsr: 0x1004
 trunc.w.s 3 3.000000
+fcsr: 0x4
 trunc.w.s -1 -1.000000
+fcsr: 0x4
 trunc.w.s 1384 1384.599976
+fcsr: 0x1004
 trunc.w.s -7 -7.294568
+fcsr: 0x1004
 trunc.w.s 1000000000 1000000000.000000
+fcsr: 0x4
 trunc.w.s -5786 -5786.470215
+fcsr: 0x1004
 trunc.w.s 1752 1752.000000
+fcsr: 0x4
 trunc.w.s 0 0.002457
+fcsr: 0x1004
 trunc.w.s 0 0.000000
+fcsr: 0x1004
 trunc.w.s -248562 -248562.765625
+fcsr: 0x1004
 trunc.w.s -45786 -45786.476562
+fcsr: 0x1004
 trunc.w.s 456 456.248962
+fcsr: 0x1004
 trunc.w.s 34 34.000462
+fcsr: 0x1004
 trunc.w.s 45786 45786.476562
+fcsr: 0x1004
 trunc.w.s 1752065 1752065.000000
+fcsr: 0x4
 trunc.w.s 107 107.000000
+fcsr: 0x4
 trunc.w.s -45667 -45667.238281
+fcsr: 0x1004
 trunc.w.s -7 -7.294568
+fcsr: 0x1004
 trunc.w.s -347856 -347856.468750
+fcsr: 0x1004
 trunc.w.s 356047 356047.562500
+fcsr: 0x1004
 trunc.w.s -1 -1.000000
+fcsr: 0x4
 trunc.w.s 23 23.040001
+fcsr: 0x1004
 trunc.w.d 0 0.000000
+fcsr: 0x4
 trunc.w.d 456 456.248956
+fcsr: 0x1004
 trunc.w.d 3 3.000000
+fcsr: 0x4
 trunc.w.d -1 -1.000000
+fcsr: 0x4
 trunc.w.d 1384 1384.600000
+fcsr: 0x1004
 trunc.w.d -7 -7.294568
+fcsr: 0x1004
 trunc.w.d 1000000000 1000000000.000000
+fcsr: 0x4
 trunc.w.d -5786 -5786.470000
+fcsr: 0x1004
 trunc.w.d 1752 1752.000000
+fcsr: 0x4
 trunc.w.d 0 0.002458
+fcsr: 0x1004
 trunc.w.d 0 0.000000
+fcsr: 0x1004
 trunc.w.d -248562 -248562.760000
+fcsr: 0x1004
 trunc.w.d -45786 -45786.476000
+fcsr: 0x1004
 trunc.w.d 456 456.248956
+fcsr: 0x1004
 trunc.w.d 34 34.000460
+fcsr: 0x1004
 trunc.w.d 45786 45786.476000
+fcsr: 0x1004
 trunc.w.d 1752065 1752065.000000
+fcsr: 0x4
 trunc.w.d 107 107.000000
+fcsr: 0x4
 trunc.w.d -45667 -45667.240000
+fcsr: 0x1004
 trunc.w.d -7 -7.294568
+fcsr: 0x1004
 trunc.w.d -347856 -347856.475000
+fcsr: 0x1004
 trunc.w.d 356047 356047.560000
+fcsr: 0x1004
 trunc.w.d -1 -1.000000
+fcsr: 0x4
 trunc.w.d 23 23.040000
+fcsr: 0x1004
 -------------------------- test FPU Conversion Operations Using the FCSR Rounding Mode --------------------------
 roundig mode: near
 cvt.d.s 0.000000 0.000000
+fcsr: 0x4
 cvt.d.s 456.248962 456.248962
+fcsr: 0x4
 cvt.d.s 3.000000 3.000000
+fcsr: 0x4
 cvt.d.s -1.000000 -1.000000
+fcsr: 0x4
 cvt.d.s 1384.599976 1384.599976
+fcsr: 0x4
 cvt.d.s -7.294568 -7.294568
+fcsr: 0x4
 cvt.d.s 1000000000.000000 1000000000.000000
+fcsr: 0x4
 cvt.d.s -5786.470215 -5786.470215
+fcsr: 0x4
 cvt.d.s 1752.000000 1752.000000
+fcsr: 0x4
 cvt.d.s 0.002457 0.002457
+fcsr: 0x4
 cvt.d.s 0.000000 0.000000
+fcsr: 0x4
 cvt.d.s -248562.765625 -248562.765625
+fcsr: 0x4
 cvt.d.s -45786.476562 -45786.476562
+fcsr: 0x4
 cvt.d.s 456.248962 456.248962
+fcsr: 0x4
 cvt.d.s 34.000462 34.000462
+fcsr: 0x4
 cvt.d.s 45786.476562 45786.476562
+fcsr: 0x4
 cvt.d.s 1752065.000000 1752065.000000
+fcsr: 0x4
 cvt.d.s 107.000000 107.000000
+fcsr: 0x4
 cvt.d.s -45667.238281 -45667.238281
+fcsr: 0x4
 cvt.d.s -7.294568 -7.294568
+fcsr: 0x4
 cvt.d.s -347856.468750 -347856.468750
+fcsr: 0x4
 cvt.d.s 356047.562500 356047.562500
+fcsr: 0x4
 cvt.d.s -1.000000 -1.000000
+fcsr: 0x4
 cvt.d.s 23.040001 23.040001
+fcsr: 0x4
 roundig mode: zero
 cvt.d.s 0.000000 0.000000
+fcsr: 0x5
 cvt.d.s 456.248962 456.248962
+fcsr: 0x5
 cvt.d.s 3.000000 3.000000
+fcsr: 0x5
 cvt.d.s -1.000000 -1.000000
+fcsr: 0x5
 cvt.d.s 1384.599976 1384.599976
+fcsr: 0x5
 cvt.d.s -7.294568 -7.294568
+fcsr: 0x5
 cvt.d.s 1000000000.000000 1000000000.000000
+fcsr: 0x5
 cvt.d.s -5786.470215 -5786.470215
+fcsr: 0x5
 cvt.d.s 1752.000000 1752.000000
+fcsr: 0x5
 cvt.d.s 0.002457 0.002457
+fcsr: 0x5
 cvt.d.s 0.000000 0.000000
+fcsr: 0x5
 cvt.d.s -248562.765625 -248562.765625
+fcsr: 0x5
 cvt.d.s -45786.476562 -45786.476562
+fcsr: 0x5
 cvt.d.s 456.248962 456.248962
+fcsr: 0x5
 cvt.d.s 34.000462 34.000462
+fcsr: 0x5
 cvt.d.s 45786.476562 45786.476562
+fcsr: 0x5
 cvt.d.s 1752065.000000 1752065.000000
+fcsr: 0x5
 cvt.d.s 107.000000 107.000000
+fcsr: 0x5
 cvt.d.s -45667.238281 -45667.238281
+fcsr: 0x5
 cvt.d.s -7.294568 -7.294568
+fcsr: 0x5
 cvt.d.s -347856.468750 -347856.468750
+fcsr: 0x5
 cvt.d.s 356047.562500 356047.562500
+fcsr: 0x5
 cvt.d.s -1.000000 -1.000000
+fcsr: 0x5
 cvt.d.s 23.040001 23.040001
+fcsr: 0x5
 roundig mode: +inf
 cvt.d.s 0.000000 0.000000
+fcsr: 0x6
 cvt.d.s 456.248962 456.248962
+fcsr: 0x6
 cvt.d.s 3.000000 3.000000
+fcsr: 0x6
 cvt.d.s -1.000000 -1.000000
+fcsr: 0x6
 cvt.d.s 1384.599976 1384.599976
+fcsr: 0x6
 cvt.d.s -7.294568 -7.294568
+fcsr: 0x6
 cvt.d.s 1000000000.000000 1000000000.000000
+fcsr: 0x6
 cvt.d.s -5786.470215 -5786.470215
+fcsr: 0x6
 cvt.d.s 1752.000000 1752.000000
+fcsr: 0x6
 cvt.d.s 0.002457 0.002457
+fcsr: 0x6
 cvt.d.s 0.000000 0.000000
+fcsr: 0x6
 cvt.d.s -248562.765625 -248562.765625
+fcsr: 0x6
 cvt.d.s -45786.476562 -45786.476562
+fcsr: 0x6
 cvt.d.s 456.248962 456.248962
+fcsr: 0x6
 cvt.d.s 34.000462 34.000462
+fcsr: 0x6
 cvt.d.s 45786.476562 45786.476562
+fcsr: 0x6
 cvt.d.s 1752065.000000 1752065.000000
+fcsr: 0x6
 cvt.d.s 107.000000 107.000000
+fcsr: 0x6
 cvt.d.s -45667.238281 -45667.238281
+fcsr: 0x6
 cvt.d.s -7.294568 -7.294568
+fcsr: 0x6
 cvt.d.s -347856.468750 -347856.468750
+fcsr: 0x6
 cvt.d.s 356047.562500 356047.562500
+fcsr: 0x6
 cvt.d.s -1.000000 -1.000000
+fcsr: 0x6
 cvt.d.s 23.040001 23.040001
+fcsr: 0x6
 roundig mode: -inf
 cvt.d.s 0.000000 0.000000
+fcsr: 0x7
 cvt.d.s 456.248962 456.248962
+fcsr: 0x7
 cvt.d.s 3.000000 3.000000
+fcsr: 0x7
 cvt.d.s -1.000000 -1.000000
+fcsr: 0x7
 cvt.d.s 1384.599976 1384.599976
+fcsr: 0x7
 cvt.d.s -7.294568 -7.294568
+fcsr: 0x7
 cvt.d.s 1000000000.000000 1000000000.000000
+fcsr: 0x7
 cvt.d.s -5786.470215 -5786.470215
+fcsr: 0x7
 cvt.d.s 1752.000000 1752.000000
+fcsr: 0x7
 cvt.d.s 0.002457 0.002457
+fcsr: 0x7
 cvt.d.s 0.000000 0.000000
+fcsr: 0x7
 cvt.d.s -248562.765625 -248562.765625
+fcsr: 0x7
 cvt.d.s -45786.476562 -45786.476562
+fcsr: 0x7
 cvt.d.s 456.248962 456.248962
+fcsr: 0x7
 cvt.d.s 34.000462 34.000462
+fcsr: 0x7
 cvt.d.s 45786.476562 45786.476562
+fcsr: 0x7
 cvt.d.s 1752065.000000 1752065.000000
+fcsr: 0x7
 cvt.d.s 107.000000 107.000000
+fcsr: 0x7
 cvt.d.s -45667.238281 -45667.238281
+fcsr: 0x7
 cvt.d.s -7.294568 -7.294568
+fcsr: 0x7
 cvt.d.s -347856.468750 -347856.468750
+fcsr: 0x7
 cvt.d.s 356047.562500 356047.562500
+fcsr: 0x7
 cvt.d.s -1.000000 -1.000000
+fcsr: 0x7
 cvt.d.s 23.040001 23.040001
+fcsr: 0x7
 roundig mode: near
 cvt.d.w 0.000000 0
+fcsr: 0x4
 cvt.d.w 456.000000 456
+fcsr: 0x4
 cvt.d.w 3.000000 3
+fcsr: 0x4
 cvt.d.w -1.000000 -1
+fcsr: 0x4
 cvt.d.w -1.000000 -1
+fcsr: 0x4
 cvt.d.w 356.000000 356
+fcsr: 0x4
 cvt.d.w 1000000000.000000 1000000000
+fcsr: 0x4
 cvt.d.w -5786.000000 -5786
+fcsr: 0x4
 cvt.d.w 1752.000000 1752
+fcsr: 0x4
 cvt.d.w 24575.000000 24575
+fcsr: 0x4
 cvt.d.w 10.000000 10
+fcsr: 0x4
 cvt.d.w -248562.000000 -248562
+fcsr: 0x4
 cvt.d.w -45786.000000 -45786
+fcsr: 0x4
 cvt.d.w 456.000000 456
+fcsr: 0x4
 cvt.d.w 34.000000 34
+fcsr: 0x4
 cvt.d.w 45786.000000 45786
+fcsr: 0x4
 cvt.d.w 1752065.000000 1752065
+fcsr: 0x4
 cvt.d.w 107.000000 107
+fcsr: 0x4
 cvt.d.w -45667.000000 -45667
+fcsr: 0x4
 cvt.d.w -7.000000 -7
+fcsr: 0x4
 cvt.d.w -347856.000000 -347856
+fcsr: 0x4
 cvt.d.w -2147483648.000000 -2147483648
+fcsr: 0x4
 cvt.d.w 268435455.000000 268435455
+fcsr: 0x4
 cvt.d.w 23.000000 23
+fcsr: 0x4
 roundig mode: zero
 cvt.d.w 0.000000 0
+fcsr: 0x5
 cvt.d.w 456.000000 456
+fcsr: 0x5
 cvt.d.w 3.000000 3
+fcsr: 0x5
 cvt.d.w -1.000000 -1
+fcsr: 0x5
 cvt.d.w -1.000000 -1
+fcsr: 0x5
 cvt.d.w 356.000000 356
+fcsr: 0x5
 cvt.d.w 1000000000.000000 1000000000
+fcsr: 0x5
 cvt.d.w -5786.000000 -5786
+fcsr: 0x5
 cvt.d.w 1752.000000 1752
+fcsr: 0x5
 cvt.d.w 24575.000000 24575
+fcsr: 0x5
 cvt.d.w 10.000000 10
+fcsr: 0x5
 cvt.d.w -248562.000000 -248562
+fcsr: 0x5
 cvt.d.w -45786.000000 -45786
+fcsr: 0x5
 cvt.d.w 456.000000 456
+fcsr: 0x5
 cvt.d.w 34.000000 34
+fcsr: 0x5
 cvt.d.w 45786.000000 45786
+fcsr: 0x5
 cvt.d.w 1752065.000000 1752065
+fcsr: 0x5
 cvt.d.w 107.000000 107
+fcsr: 0x5
 cvt.d.w -45667.000000 -45667
+fcsr: 0x5
 cvt.d.w -7.000000 -7
+fcsr: 0x5
 cvt.d.w -347856.000000 -347856
+fcsr: 0x5
 cvt.d.w -2147483648.000000 -2147483648
+fcsr: 0x5
 cvt.d.w 268435455.000000 268435455
+fcsr: 0x5
 cvt.d.w 23.000000 23
+fcsr: 0x5
 roundig mode: +inf
 cvt.d.w 0.000000 0
+fcsr: 0x6
 cvt.d.w 456.000000 456
+fcsr: 0x6
 cvt.d.w 3.000000 3
+fcsr: 0x6
 cvt.d.w -1.000000 -1
+fcsr: 0x6
 cvt.d.w -1.000000 -1
+fcsr: 0x6
 cvt.d.w 356.000000 356
+fcsr: 0x6
 cvt.d.w 1000000000.000000 1000000000
+fcsr: 0x6
 cvt.d.w -5786.000000 -5786
+fcsr: 0x6
 cvt.d.w 1752.000000 1752
+fcsr: 0x6
 cvt.d.w 24575.000000 24575
+fcsr: 0x6
 cvt.d.w 10.000000 10
+fcsr: 0x6
 cvt.d.w -248562.000000 -248562
+fcsr: 0x6
 cvt.d.w -45786.000000 -45786
+fcsr: 0x6
 cvt.d.w 456.000000 456
+fcsr: 0x6
 cvt.d.w 34.000000 34
+fcsr: 0x6
 cvt.d.w 45786.000000 45786
+fcsr: 0x6
 cvt.d.w 1752065.000000 1752065
+fcsr: 0x6
 cvt.d.w 107.000000 107
+fcsr: 0x6
 cvt.d.w -45667.000000 -45667
+fcsr: 0x6
 cvt.d.w -7.000000 -7
+fcsr: 0x6
 cvt.d.w -347856.000000 -347856
+fcsr: 0x6
 cvt.d.w -2147483648.000000 -2147483648
+fcsr: 0x6
 cvt.d.w 268435455.000000 268435455
+fcsr: 0x6
 cvt.d.w 23.000000 23
+fcsr: 0x6
 roundig mode: -inf
 cvt.d.w 0.000000 0
+fcsr: 0x7
 cvt.d.w 456.000000 456
+fcsr: 0x7
 cvt.d.w 3.000000 3
+fcsr: 0x7
 cvt.d.w -1.000000 -1
+fcsr: 0x7
 cvt.d.w -1.000000 -1
+fcsr: 0x7
 cvt.d.w 356.000000 356
+fcsr: 0x7
 cvt.d.w 1000000000.000000 1000000000
+fcsr: 0x7
 cvt.d.w -5786.000000 -5786
+fcsr: 0x7
 cvt.d.w 1752.000000 1752
+fcsr: 0x7
 cvt.d.w 24575.000000 24575
+fcsr: 0x7
 cvt.d.w 10.000000 10
+fcsr: 0x7
 cvt.d.w -248562.000000 -248562
+fcsr: 0x7
 cvt.d.w -45786.000000 -45786
+fcsr: 0x7
 cvt.d.w 456.000000 456
+fcsr: 0x7
 cvt.d.w 34.000000 34
+fcsr: 0x7
 cvt.d.w 45786.000000 45786
+fcsr: 0x7
 cvt.d.w 1752065.000000 1752065
+fcsr: 0x7
 cvt.d.w 107.000000 107
+fcsr: 0x7
 cvt.d.w -45667.000000 -45667
+fcsr: 0x7
 cvt.d.w -7.000000 -7
+fcsr: 0x7
 cvt.d.w -347856.000000 -347856
+fcsr: 0x7
 cvt.d.w -2147483648.000000 -2147483648
+fcsr: 0x7
 cvt.d.w 268435455.000000 268435455
+fcsr: 0x7
 cvt.d.w 23.000000 23
+fcsr: 0x7
 roundig mode: near
 cvt.s.d 0.000000 0.000000
+fcsr: 0x4
 cvt.s.d 456.248962 456.248956
+fcsr: 0x1004
 cvt.s.d 3.000000 3.000000
+fcsr: 0x4
 cvt.s.d -1.000000 -1.000000
+fcsr: 0x4
 cvt.s.d 1384.599976 1384.600000
+fcsr: 0x1004
 cvt.s.d -7.294568 -7.294568
+fcsr: 0x1004
 cvt.s.d 1000000000.000000 1000000000.000000
+fcsr: 0x4
 cvt.s.d -5786.470215 -5786.470000
+fcsr: 0x1004
 cvt.s.d 1752.000000 1752.000000
+fcsr: 0x4
 cvt.s.d 0.002457 0.002458
+fcsr: 0x1004
 cvt.s.d 0.000000 0.000000
+fcsr: 0x1004
 cvt.s.d -248562.765625 -248562.760000
+fcsr: 0x1004
 cvt.s.d -45786.476562 -45786.476000
+fcsr: 0x1004
 cvt.s.d 456.248962 456.248956
+fcsr: 0x1004
 cvt.s.d 34.000462 34.000460
+fcsr: 0x1004
 cvt.s.d 45786.476562 45786.476000
+fcsr: 0x1004
 cvt.s.d 1752065.000000 1752065.000000
+fcsr: 0x4
 cvt.s.d 107.000000 107.000000
+fcsr: 0x4
 cvt.s.d -45667.238281 -45667.240000
+fcsr: 0x1004
 cvt.s.d -7.294568 -7.294568
+fcsr: 0x1004
 cvt.s.d -347856.468750 -347856.475000
+fcsr: 0x1004
 cvt.s.d 356047.562500 356047.560000
+fcsr: 0x1004
 cvt.s.d -1.000000 -1.000000
+fcsr: 0x4
 cvt.s.d 23.040001 23.040000
+fcsr: 0x1004
 roundig mode: zero
 cvt.s.d 0.000000 0.000000
+fcsr: 0x5
 cvt.s.d 456.248932 456.248956
+fcsr: 0x1005
 cvt.s.d 3.000000 3.000000
+fcsr: 0x5
 cvt.s.d -1.000000 -1.000000
+fcsr: 0x5
 cvt.s.d 1384.599976 1384.600000
+fcsr: 0x1005
 cvt.s.d -7.294568 -7.294568
+fcsr: 0x1005
 cvt.s.d 1000000000.000000 1000000000.000000
+fcsr: 0x5
 cvt.s.d -5786.469727 -5786.470000
+fcsr: 0x1005
 cvt.s.d 1752.000000 1752.000000
+fcsr: 0x5
 cvt.s.d 0.002457 0.002458
+fcsr: 0x1005
 cvt.s.d 0.000000 0.000000
+fcsr: 0x1005
 cvt.s.d -248562.750000 -248562.760000
+fcsr: 0x1005
 cvt.s.d -45786.472656 -45786.476000
+fcsr: 0x1005
 cvt.s.d 456.248932 456.248956
+fcsr: 0x1005
 cvt.s.d 34.000458 34.000460
+fcsr: 0x1005
 cvt.s.d 45786.472656 45786.476000
+fcsr: 0x1005
 cvt.s.d 1752065.000000 1752065.000000
+fcsr: 0x5
 cvt.s.d 107.000000 107.000000
+fcsr: 0x5
 cvt.s.d -45667.238281 -45667.240000
+fcsr: 0x1005
 cvt.s.d -7.294568 -7.294568
+fcsr: 0x1005
 cvt.s.d -347856.468750 -347856.475000
+fcsr: 0x1005
 cvt.s.d 356047.531250 356047.560000
+fcsr: 0x1005
 cvt.s.d -1.000000 -1.000000
+fcsr: 0x5
 cvt.s.d 23.039999 23.040000
+fcsr: 0x1005
 roundig mode: +inf
 cvt.s.d 0.000000 0.000000
+fcsr: 0x6
 cvt.s.d 456.248962 456.248956
+fcsr: 0x1006
 cvt.s.d 3.000000 3.000000
+fcsr: 0x6
 cvt.s.d -1.000000 -1.000000
+fcsr: 0x6
 cvt.s.d 1384.600098 1384.600000
+fcsr: 0x1006
 cvt.s.d -7.294568 -7.294568
+fcsr: 0x1006
 cvt.s.d 1000000000.000000 1000000000.000000
+fcsr: 0x6
 cvt.s.d -5786.469727 -5786.470000
+fcsr: 0x1006
 cvt.s.d 1752.000000 1752.000000
+fcsr: 0x6
 cvt.s.d 0.002458 0.002458
+fcsr: 0x1006
 cvt.s.d 0.000000 0.000000
+fcsr: 0x1006
 cvt.s.d -248562.750000 -248562.760000
+fcsr: 0x1006
 cvt.s.d -45786.472656 -45786.476000
+fcsr: 0x1006
 cvt.s.d 456.248962 456.248956
+fcsr: 0x1006
 cvt.s.d 34.000462 34.000460
+fcsr: 0x1006
 cvt.s.d 45786.476562 45786.476000
+fcsr: 0x1006
 cvt.s.d 1752065.000000 1752065.000000
+fcsr: 0x6
 cvt.s.d 107.000000 107.000000
+fcsr: 0x6
 cvt.s.d -45667.238281 -45667.240000
+fcsr: 0x1006
 cvt.s.d -7.294568 -7.294568
+fcsr: 0x1006
 cvt.s.d -347856.468750 -347856.475000
+fcsr: 0x1006
 cvt.s.d 356047.562500 356047.560000
+fcsr: 0x1006
 cvt.s.d -1.000000 -1.000000
+fcsr: 0x6
 cvt.s.d 23.040001 23.040000
+fcsr: 0x1006
 roundig mode: -inf
 cvt.s.d 0.000000 0.000000
+fcsr: 0x7
 cvt.s.d 456.248932 456.248956
+fcsr: 0x1007
 cvt.s.d 3.000000 3.000000
+fcsr: 0x7
 cvt.s.d -1.000000 -1.000000
+fcsr: 0x7
 cvt.s.d 1384.599976 1384.600000
+fcsr: 0x1007
 cvt.s.d -7.294568 -7.294568
+fcsr: 0x1007
 cvt.s.d 1000000000.000000 1000000000.000000
+fcsr: 0x7
 cvt.s.d -5786.470215 -5786.470000
+fcsr: 0x1007
 cvt.s.d 1752.000000 1752.000000
+fcsr: 0x7
 cvt.s.d 0.002457 0.002458
+fcsr: 0x1007
 cvt.s.d 0.000000 0.000000
+fcsr: 0x1007
 cvt.s.d -248562.765625 -248562.760000
+fcsr: 0x1007
 cvt.s.d -45786.476562 -45786.476000
+fcsr: 0x1007
 cvt.s.d 456.248932 456.248956
+fcsr: 0x1007
 cvt.s.d 34.000458 34.000460
+fcsr: 0x1007
 cvt.s.d 45786.472656 45786.476000
+fcsr: 0x1007
 cvt.s.d 1752065.000000 1752065.000000
+fcsr: 0x7
 cvt.s.d 107.000000 107.000000
+fcsr: 0x7
 cvt.s.d -45667.242188 -45667.240000
+fcsr: 0x1007
 cvt.s.d -7.294568 -7.294568
+fcsr: 0x1007
 cvt.s.d -347856.500000 -347856.475000
+fcsr: 0x1007
 cvt.s.d 356047.531250 356047.560000
+fcsr: 0x1007
 cvt.s.d -1.000000 -1.000000
+fcsr: 0x7
 cvt.s.d 23.039999 23.040000
+fcsr: 0x1007
 roundig mode: near
 cvt.s.w 0.000000 0
+fcsr: 0x4
 cvt.s.w 456.000000 456
+fcsr: 0x4
 cvt.s.w 3.000000 3
+fcsr: 0x4
 cvt.s.w -1.000000 -1
+fcsr: 0x4
 cvt.s.w -1.000000 -1
+fcsr: 0x4
 cvt.s.w 356.000000 356
+fcsr: 0x4
 cvt.s.w 1000000000.000000 1000000000
+fcsr: 0x4
 cvt.s.w -5786.000000 -5786
+fcsr: 0x4
 cvt.s.w 1752.000000 1752
+fcsr: 0x4
 cvt.s.w 24575.000000 24575
+fcsr: 0x4
 cvt.s.w 10.000000 10
+fcsr: 0x4
 cvt.s.w -248562.000000 -248562
+fcsr: 0x4
 cvt.s.w -45786.000000 -45786
+fcsr: 0x4
 cvt.s.w 456.000000 456
+fcsr: 0x4
 cvt.s.w 34.000000 34
+fcsr: 0x4
 cvt.s.w 45786.000000 45786
+fcsr: 0x4
 cvt.s.w 1752065.000000 1752065
+fcsr: 0x4
 cvt.s.w 107.000000 107
+fcsr: 0x4
 cvt.s.w -45667.000000 -45667
+fcsr: 0x4
 cvt.s.w -7.000000 -7
+fcsr: 0x4
 cvt.s.w -347856.000000 -347856
+fcsr: 0x4
 cvt.s.w -2147483648.000000 -2147483648
+fcsr: 0x4
 cvt.s.w 268435456.000000 268435455
+fcsr: 0x1004
 cvt.s.w 23.000000 23
+fcsr: 0x4
 roundig mode: zero
 cvt.s.w 0.000000 0
+fcsr: 0x5
 cvt.s.w 456.000000 456
+fcsr: 0x5
 cvt.s.w 3.000000 3
+fcsr: 0x5
 cvt.s.w -1.000000 -1
+fcsr: 0x5
 cvt.s.w -1.000000 -1
+fcsr: 0x5
 cvt.s.w 356.000000 356
+fcsr: 0x5
 cvt.s.w 1000000000.000000 1000000000
+fcsr: 0x5
 cvt.s.w -5786.000000 -5786
+fcsr: 0x5
 cvt.s.w 1752.000000 1752
+fcsr: 0x5
 cvt.s.w 24575.000000 24575
+fcsr: 0x5
 cvt.s.w 10.000000 10
+fcsr: 0x5
 cvt.s.w -248562.000000 -248562
+fcsr: 0x5
 cvt.s.w -45786.000000 -45786
+fcsr: 0x5
 cvt.s.w 456.000000 456
+fcsr: 0x5
 cvt.s.w 34.000000 34
+fcsr: 0x5
 cvt.s.w 45786.000000 45786
+fcsr: 0x5
 cvt.s.w 1752065.000000 1752065
+fcsr: 0x5
 cvt.s.w 107.000000 107
+fcsr: 0x5
 cvt.s.w -45667.000000 -45667
+fcsr: 0x5
 cvt.s.w -7.000000 -7
+fcsr: 0x5
 cvt.s.w -347856.000000 -347856
+fcsr: 0x5
 cvt.s.w -2147483648.000000 -2147483648
+fcsr: 0x5
 cvt.s.w 268435440.000000 268435455
+fcsr: 0x1005
 cvt.s.w 23.000000 23
+fcsr: 0x5
 roundig mode: +inf
 cvt.s.w 0.000000 0
+fcsr: 0x6
 cvt.s.w 456.000000 456
+fcsr: 0x6
 cvt.s.w 3.000000 3
+fcsr: 0x6
 cvt.s.w -1.000000 -1
+fcsr: 0x6
 cvt.s.w -1.000000 -1
+fcsr: 0x6
 cvt.s.w 356.000000 356
+fcsr: 0x6
 cvt.s.w 1000000000.000000 1000000000
+fcsr: 0x6
 cvt.s.w -5786.000000 -5786
+fcsr: 0x6
 cvt.s.w 1752.000000 1752
+fcsr: 0x6
 cvt.s.w 24575.000000 24575
+fcsr: 0x6
 cvt.s.w 10.000000 10
+fcsr: 0x6
 cvt.s.w -248562.000000 -248562
+fcsr: 0x6
 cvt.s.w -45786.000000 -45786
+fcsr: 0x6
 cvt.s.w 456.000000 456
+fcsr: 0x6
 cvt.s.w 34.000000 34
+fcsr: 0x6
 cvt.s.w 45786.000000 45786
+fcsr: 0x6
 cvt.s.w 1752065.000000 1752065
+fcsr: 0x6
 cvt.s.w 107.000000 107
+fcsr: 0x6
 cvt.s.w -45667.000000 -45667
+fcsr: 0x6
 cvt.s.w -7.000000 -7
+fcsr: 0x6
 cvt.s.w -347856.000000 -347856
+fcsr: 0x6
 cvt.s.w -2147483648.000000 -2147483648
+fcsr: 0x6
 cvt.s.w 268435456.000000 268435455
+fcsr: 0x1006
 cvt.s.w 23.000000 23
+fcsr: 0x6
 roundig mode: -inf
 cvt.s.w 0.000000 0
+fcsr: 0x7
 cvt.s.w 456.000000 456
+fcsr: 0x7
 cvt.s.w 3.000000 3
+fcsr: 0x7
 cvt.s.w -1.000000 -1
+fcsr: 0x7
 cvt.s.w -1.000000 -1
+fcsr: 0x7
 cvt.s.w 356.000000 356
+fcsr: 0x7
 cvt.s.w 1000000000.000000 1000000000
+fcsr: 0x7
 cvt.s.w -5786.000000 -5786
+fcsr: 0x7
 cvt.s.w 1752.000000 1752
+fcsr: 0x7
 cvt.s.w 24575.000000 24575
+fcsr: 0x7
 cvt.s.w 10.000000 10
+fcsr: 0x7
 cvt.s.w -248562.000000 -248562
+fcsr: 0x7
 cvt.s.w -45786.000000 -45786
+fcsr: 0x7
 cvt.s.w 456.000000 456
+fcsr: 0x7
 cvt.s.w 34.000000 34
+fcsr: 0x7
 cvt.s.w 45786.000000 45786
+fcsr: 0x7
 cvt.s.w 1752065.000000 1752065
+fcsr: 0x7
 cvt.s.w 107.000000 107
+fcsr: 0x7
 cvt.s.w -45667.000000 -45667
+fcsr: 0x7
 cvt.s.w -7.000000 -7
+fcsr: 0x7
 cvt.s.w -347856.000000 -347856
+fcsr: 0x7
 cvt.s.w -2147483648.000000 -2147483648
+fcsr: 0x7
 cvt.s.w 268435440.000000 268435455
+fcsr: 0x1007
 cvt.s.w 23.000000 23
+fcsr: 0x7
 roundig mode: near
 cvt.w.s 0 0.000000
+fcsr: 0x4
 cvt.w.s 456 456.248962
+fcsr: 0x1004
 cvt.w.s 3 3.000000
+fcsr: 0x4
 cvt.w.s -1 -1.000000
+fcsr: 0x4
 cvt.w.s 1385 1384.599976
+fcsr: 0x1004
 cvt.w.s -7 -7.294568
+fcsr: 0x1004
 cvt.w.s 1000000000 1000000000.000000
+fcsr: 0x4
 cvt.w.s -5786 -5786.470215
+fcsr: 0x1004
 cvt.w.s 1752 1752.000000
+fcsr: 0x4
 cvt.w.s 0 0.002457
+fcsr: 0x1004
 cvt.w.s 0 0.000000
+fcsr: 0x1004
 cvt.w.s -248563 -248562.765625
+fcsr: 0x1004
 cvt.w.s -45786 -45786.476562
+fcsr: 0x1004
 cvt.w.s 456 456.248962
+fcsr: 0x1004
 cvt.w.s 34 34.000462
+fcsr: 0x1004
 cvt.w.s 45786 45786.476562
+fcsr: 0x1004
 cvt.w.s 1752065 1752065.000000
+fcsr: 0x4
 cvt.w.s 107 107.000000
+fcsr: 0x4
 cvt.w.s -45667 -45667.238281
+fcsr: 0x1004
 cvt.w.s -7 -7.294568
+fcsr: 0x1004
 cvt.w.s -347856 -347856.468750
+fcsr: 0x1004
 cvt.w.s 356048 356047.562500
+fcsr: 0x1004
 cvt.w.s -1 -1.000000
+fcsr: 0x4
 cvt.w.s 23 23.040001
+fcsr: 0x1004
 roundig mode: zero
 cvt.w.s 0 0.000000
+fcsr: 0x5
 cvt.w.s 456 456.248962
+fcsr: 0x1005
 cvt.w.s 3 3.000000
+fcsr: 0x5
 cvt.w.s -1 -1.000000
+fcsr: 0x5
 cvt.w.s 1384 1384.599976
+fcsr: 0x1005
 cvt.w.s -7 -7.294568
+fcsr: 0x1005
 cvt.w.s 1000000000 1000000000.000000
+fcsr: 0x5
 cvt.w.s -5786 -5786.470215
+fcsr: 0x1005
 cvt.w.s 1752 1752.000000
+fcsr: 0x5
 cvt.w.s 0 0.002457
+fcsr: 0x1005
 cvt.w.s 0 0.000000
+fcsr: 0x1005
 cvt.w.s -248562 -248562.765625
+fcsr: 0x1005
 cvt.w.s -45786 -45786.476562
+fcsr: 0x1005
 cvt.w.s 456 456.248962
+fcsr: 0x1005
 cvt.w.s 34 34.000462
+fcsr: 0x1005
 cvt.w.s 45786 45786.476562
+fcsr: 0x1005
 cvt.w.s 1752065 1752065.000000
+fcsr: 0x5
 cvt.w.s 107 107.000000
+fcsr: 0x5
 cvt.w.s -45667 -45667.238281
+fcsr: 0x1005
 cvt.w.s -7 -7.294568
+fcsr: 0x1005
 cvt.w.s -347856 -347856.468750
+fcsr: 0x1005
 cvt.w.s 356047 356047.562500
+fcsr: 0x1005
 cvt.w.s -1 -1.000000
+fcsr: 0x5
 cvt.w.s 23 23.040001
+fcsr: 0x1005
 roundig mode: +inf
 cvt.w.s 0 0.000000
+fcsr: 0x6
 cvt.w.s 457 456.248962
+fcsr: 0x1006
 cvt.w.s 3 3.000000
+fcsr: 0x6
 cvt.w.s -1 -1.000000
+fcsr: 0x6
 cvt.w.s 1385 1384.599976
+fcsr: 0x1006
 cvt.w.s -7 -7.294568
+fcsr: 0x1006
 cvt.w.s 1000000000 1000000000.000000
+fcsr: 0x6
 cvt.w.s -5786 -5786.470215
+fcsr: 0x1006
 cvt.w.s 1752 1752.000000
+fcsr: 0x6
 cvt.w.s 1 0.002457
+fcsr: 0x1006
 cvt.w.s 1 0.000000
+fcsr: 0x1006
 cvt.w.s -248562 -248562.765625
+fcsr: 0x1006
 cvt.w.s -45786 -45786.476562
+fcsr: 0x1006
 cvt.w.s 457 456.248962
+fcsr: 0x1006
 cvt.w.s 35 34.000462
+fcsr: 0x1006
 cvt.w.s 45787 45786.476562
+fcsr: 0x1006
 cvt.w.s 1752065 1752065.000000
+fcsr: 0x6
 cvt.w.s 107 107.000000
+fcsr: 0x6
 cvt.w.s -45667 -45667.238281
+fcsr: 0x1006
 cvt.w.s -7 -7.294568
+fcsr: 0x1006
 cvt.w.s -347856 -347856.468750
+fcsr: 0x1006
 cvt.w.s 356048 356047.562500
+fcsr: 0x1006
 cvt.w.s -1 -1.000000
+fcsr: 0x6
 cvt.w.s 24 23.040001
+fcsr: 0x1006
 roundig mode: -inf
 cvt.w.s 0 0.000000
+fcsr: 0x7
 cvt.w.s 456 456.248962
+fcsr: 0x1007
 cvt.w.s 3 3.000000
+fcsr: 0x7
 cvt.w.s -1 -1.000000
+fcsr: 0x7
 cvt.w.s 1384 1384.599976
+fcsr: 0x1007
 cvt.w.s -8 -7.294568
+fcsr: 0x1007
 cvt.w.s 1000000000 1000000000.000000
+fcsr: 0x7
 cvt.w.s -5787 -5786.470215
+fcsr: 0x1007
 cvt.w.s 1752 1752.000000
+fcsr: 0x7
 cvt.w.s 0 0.002457
+fcsr: 0x1007
 cvt.w.s 0 0.000000
+fcsr: 0x1007
 cvt.w.s -248563 -248562.765625
+fcsr: 0x1007
 cvt.w.s -45787 -45786.476562
+fcsr: 0x1007
 cvt.w.s 456 456.248962
+fcsr: 0x1007
 cvt.w.s 34 34.000462
+fcsr: 0x1007
 cvt.w.s 45786 45786.476562
+fcsr: 0x1007
 cvt.w.s 1752065 1752065.000000
+fcsr: 0x7
 cvt.w.s 107 107.000000
+fcsr: 0x7
 cvt.w.s -45668 -45667.238281
+fcsr: 0x1007
 cvt.w.s -8 -7.294568
+fcsr: 0x1007
 cvt.w.s -347857 -347856.468750
+fcsr: 0x1007
 cvt.w.s 356047 356047.562500
+fcsr: 0x1007
 cvt.w.s -1 -1.000000
+fcsr: 0x7
 cvt.w.s 23 23.040001
+fcsr: 0x1007
 roundig mode: near
 cvt.w.d 0 0.000000
+fcsr: 0x4
 cvt.w.d 456 456.248956
+fcsr: 0x1004
 cvt.w.d 3 3.000000
+fcsr: 0x4
 cvt.w.d -1 -1.000000
+fcsr: 0x4
 cvt.w.d 1385 1384.600000
+fcsr: 0x1004
 cvt.w.d -7 -7.294568
+fcsr: 0x1004
 cvt.w.d 1000000000 1000000000.000000
+fcsr: 0x4
 cvt.w.d -5786 -5786.470000
+fcsr: 0x1004
 cvt.w.d 1752 1752.000000
+fcsr: 0x4
 cvt.w.d 0 0.002458
+fcsr: 0x1004
 cvt.w.d 0 0.000000
+fcsr: 0x1004
 cvt.w.d -248563 -248562.760000
+fcsr: 0x1004
 cvt.w.d -45786 -45786.476000
+fcsr: 0x1004
 cvt.w.d 456 456.248956
+fcsr: 0x1004
 cvt.w.d 34 34.000460
+fcsr: 0x1004
 cvt.w.d 45786 45786.476000
+fcsr: 0x1004
 cvt.w.d 1752065 1752065.000000
+fcsr: 0x4
 cvt.w.d 107 107.000000
+fcsr: 0x4
 cvt.w.d -45667 -45667.240000
+fcsr: 0x1004
 cvt.w.d -7 -7.294568
+fcsr: 0x1004
 cvt.w.d -347856 -347856.475000
+fcsr: 0x1004
 cvt.w.d 356048 356047.560000
+fcsr: 0x1004
 cvt.w.d -1 -1.000000
+fcsr: 0x4
 cvt.w.d 23 23.040000
+fcsr: 0x1004
 roundig mode: zero
 cvt.w.d 0 0.000000
+fcsr: 0x5
 cvt.w.d 456 456.248956
+fcsr: 0x1005
 cvt.w.d 3 3.000000
+fcsr: 0x5
 cvt.w.d -1 -1.000000
+fcsr: 0x5
 cvt.w.d 1384 1384.600000
+fcsr: 0x1005
 cvt.w.d -7 -7.294568
+fcsr: 0x1005
 cvt.w.d 1000000000 1000000000.000000
+fcsr: 0x5
 cvt.w.d -5786 -5786.470000
+fcsr: 0x1005
 cvt.w.d 1752 1752.000000
+fcsr: 0x5
 cvt.w.d 0 0.002458
+fcsr: 0x1005
 cvt.w.d 0 0.000000
+fcsr: 0x1005
 cvt.w.d -248562 -248562.760000
+fcsr: 0x1005
 cvt.w.d -45786 -45786.476000
+fcsr: 0x1005
 cvt.w.d 456 456.248956
+fcsr: 0x1005
 cvt.w.d 34 34.000460
+fcsr: 0x1005
 cvt.w.d 45786 45786.476000
+fcsr: 0x1005
 cvt.w.d 1752065 1752065.000000
+fcsr: 0x5
 cvt.w.d 107 107.000000
+fcsr: 0x5
 cvt.w.d -45667 -45667.240000
+fcsr: 0x1005
 cvt.w.d -7 -7.294568
+fcsr: 0x1005
 cvt.w.d -347856 -347856.475000
+fcsr: 0x1005
 cvt.w.d 356047 356047.560000
+fcsr: 0x1005
 cvt.w.d -1 -1.000000
+fcsr: 0x5
 cvt.w.d 23 23.040000
+fcsr: 0x1005
 roundig mode: +inf
 cvt.w.d 0 0.000000
+fcsr: 0x6
 cvt.w.d 457 456.248956
+fcsr: 0x1006
 cvt.w.d 3 3.000000
+fcsr: 0x6
 cvt.w.d -1 -1.000000
+fcsr: 0x6
 cvt.w.d 1385 1384.600000
+fcsr: 0x1006
 cvt.w.d -7 -7.294568
+fcsr: 0x1006
 cvt.w.d 1000000000 1000000000.000000
+fcsr: 0x6
 cvt.w.d -5786 -5786.470000
+fcsr: 0x1006
 cvt.w.d 1752 1752.000000
+fcsr: 0x6
 cvt.w.d 1 0.002458
+fcsr: 0x1006
 cvt.w.d 1 0.000000
+fcsr: 0x1006
 cvt.w.d -248562 -248562.760000
+fcsr: 0x1006
 cvt.w.d -45786 -45786.476000
+fcsr: 0x1006
 cvt.w.d 457 456.248956
+fcsr: 0x1006
 cvt.w.d 35 34.000460
+fcsr: 0x1006
 cvt.w.d 45787 45786.476000
+fcsr: 0x1006
 cvt.w.d 1752065 1752065.000000
+fcsr: 0x6
 cvt.w.d 107 107.000000
+fcsr: 0x6
 cvt.w.d -45667 -45667.240000
+fcsr: 0x1006
 cvt.w.d -7 -7.294568
+fcsr: 0x1006
 cvt.w.d -347856 -347856.475000
+fcsr: 0x1006
 cvt.w.d 356048 356047.560000
+fcsr: 0x1006
 cvt.w.d -1 -1.000000
+fcsr: 0x6
 cvt.w.d 24 23.040000
+fcsr: 0x1006
 roundig mode: -inf
 cvt.w.d 0 0.000000
+fcsr: 0x7
 cvt.w.d 456 456.248956
+fcsr: 0x1007
 cvt.w.d 3 3.000000
+fcsr: 0x7
 cvt.w.d -1 -1.000000
+fcsr: 0x7
 cvt.w.d 1384 1384.600000
+fcsr: 0x1007
 cvt.w.d -8 -7.294568
+fcsr: 0x1007
 cvt.w.d 1000000000 1000000000.000000
+fcsr: 0x7
 cvt.w.d -5787 -5786.470000
+fcsr: 0x1007
 cvt.w.d 1752 1752.000000
+fcsr: 0x7
 cvt.w.d 0 0.002458
+fcsr: 0x1007
 cvt.w.d 0 0.000000
+fcsr: 0x1007
 cvt.w.d -248563 -248562.760000
+fcsr: 0x1007
 cvt.w.d -45787 -45786.476000
+fcsr: 0x1007
 cvt.w.d 456 456.248956
+fcsr: 0x1007
 cvt.w.d 34 34.000460
+fcsr: 0x1007
 cvt.w.d 45786 45786.476000
+fcsr: 0x1007
 cvt.w.d 1752065 1752065.000000
+fcsr: 0x7
 cvt.w.d 107 107.000000
+fcsr: 0x7
 cvt.w.d -45668 -45667.240000
+fcsr: 0x1007
 cvt.w.d -8 -7.294568
+fcsr: 0x1007
 cvt.w.d -347857 -347856.475000
+fcsr: 0x1007
 cvt.w.d 356047 356047.560000
+fcsr: 0x1007
 cvt.w.d -1 -1.000000
+fcsr: 0x7
 cvt.w.d 23 23.040000
+fcsr: 0x1007

diff --git a/none/tests/mips32/test_fcsr.c b/none/tests/mips32/test_fcsr.c
new file mode 100644 (file)
index 0000000..6ceda77
--- /dev/null
+++ b/none/tests/mips32/test_fcsr.c
@@ -0,0 +1,30 @@
+#include <stdio.h>
+
+int main ()
+{
+   int out [] = {0, 0};
+   __asm__ volatile("cfc1       $a1,   $31"         "\n\t"
+                    "li         $t0,   0xd70a3d71"  "\n\t"
+                    "mtc1       $t0,   $f0"         "\n\t"
+                    "li         $t0,   0x405ee0a3"  "\n\t"
+                    "mtc1       $t0,   $f1"         "\n\t"
+                    "ctc1       $zero, $31"         "\n\t"
+                    "round.w.d  $f0,   $f0"         "\n\t"
+                    "cfc1       $a2,   $31"         "\n\t"
+                    "sw         $a2,   0(%0)"       "\n\t"
+                    "li         $t0,   0x00000000"  "\n\t"
+                    "mtc1       $t0,   $f0"         "\n\t"
+                    "li         $t0,   0x3ff00000"  "\n\t"
+                    "mtc1       $t0,   $f1"         "\n\t"
+                    "ctc1       $zero, $31"         "\n\t"
+                    "round.w.d  $f0,   $f0"         "\n\t"
+                    "cfc1       $a2,   $31"         "\n\t"
+                    "sw         $a2,   4(%0)"       "\n\t"
+                    "ctc1       $a1,   $31"         "\n\t"
+                    :
+                    : "r" (out)
+                    : "a1", "a2", "t0", "$f0", "$f1"
+                   );
+   printf("FCSR::1: 0x%x, 2: 0x%x\n", out[0], out[1]);
+   return 0;
+}

diff --git a/none/tests/mips32/test_fcsr.stderr.exp b/none/tests/mips32/test_fcsr.stderr.exp
new file mode 100644 (file)
index 0000000..e69de29

diff --git a/none/tests/mips32/test_fcsr.stdout.exp b/none/tests/mips32/test_fcsr.stdout.exp
new file mode 100644 (file)
index 0000000..a1f085b
--- /dev/null
+++ b/none/tests/mips32/test_fcsr.stdout.exp
@@ -0,0 +1 @@
+FCSR::1: 0x1004, 2: 0x0

diff --git a/none/tests/mips32/test_fcsr.vgtest b/none/tests/mips32/test_fcsr.vgtest
new file mode 100644 (file)
index 0000000..c864d25
--- /dev/null
+++ b/none/tests/mips32/test_fcsr.vgtest
@@ -0,0 +1,2 @@
+prog: test_fcsr
+vgopts: -q

diff --git a/none/tests/mips64/Makefile.am b/none/tests/mips64/Makefile.am
index 0184e0948742b7d328f09bca0cff6505fda7b311..b2d34415ed9c7b9d7dd8f7af98a2e823e5c5f690 100644 (file)
--- a/none/tests/mips64/Makefile.am
+++ b/none/tests/mips64/Makefile.am
@@ -40,7 +40,9 @@ EXTRA_DIST = \
        unaligned_load.stdout.exp-BE unaligned_load.stdout.exp-LE \
        unaligned_load.stderr.exp unaligned_load.vgtest \
        unaligned_load_store.stdout.exp-LE unaligned_load_store.stdout.exp-BE \
-       unaligned_load_store.stderr.exp unaligned_load_store.vgtest
+       unaligned_load_store.stderr.exp unaligned_load_store.vgtest \
+       test_fcsr.stdout.exp test_fcsr.stderr.exp \
+       test_fcsr.vgtest
 
 check_PROGRAMS = \
        allexec \
@@ -63,7 +65,8 @@ check_PROGRAMS = \
        shift_instructions \
        test_block_size \
        unaligned_load \
-       unaligned_load_store
+       unaligned_load_store \
+       test_fcsr
 
 AM_CFLAGS    += @FLAG_M64@
 AM_CXXFLAGS  += @FLAG_M64@

diff --git a/none/tests/mips64/fpu_arithmetic.c b/none/tests/mips64/fpu_arithmetic.c
index 6b842102aae696481372931abeeae3de92bbc44f..0d6fba56c13ea03d695e0bcc643f32a904a7d3e2 100644 (file)
--- a/none/tests/mips64/fpu_arithmetic.c
+++ b/none/tests/mips64/fpu_arithmetic.c
@@ -7,6 +7,7 @@ int arithmeticOperations(flt_art_op_t op)
    double fd_d = 0;
    float fd_f = 0;
    int i = 0;
+   int fcsr = 0;
    round_mode_t rm;
    for (rm = TO_NEAREST; rm <= TO_MINUS_INFINITY; rm ++) {
       set_rounding_mode(rm);

diff --git a/none/tests/mips64/macro_fpu.h b/none/tests/mips64/macro_fpu.h
index 2d1c48c1cce93b76bfe27c1ada4b9cf367219290..8c804a54bc91a3d1d38d399d7b77c5cd6ea8795a 100644 (file)
--- a/none/tests/mips64/macro_fpu.h
+++ b/none/tests/mips64/macro_fpu.h
@@ -52,147 +52,163 @@ const char *flt_round_op_names[] = {
    "cvt.l.d", "cvt.s.l",
 };
 
-#define UNOPdd(op)         \
-   fd_d = 0;               \
-   __asm__ __volatile__(   \
-      op" %0, %1"  "\n\t"  \
-      : "=f"(fd_d)         \
-      : "f"(fs_d[i])       \
+#define UNOPdd(op)               \
+   fd_d = 0;                     \
+   __asm__ __volatile__(         \
+      op"   %1, %2"   "\n\t"     \
+      "cfc1 %0, $31"  "\n\t"     \
+      : "=r" (fcsr), "=f"(fd_d)  \
+      : "f"(fs_d[i])             \
    );
 
-#define UNOPff(op)        \
-   fd_f = 0;              \
-   __asm__ __volatile__(  \
-      op" %0, %1"  "\n\t" \
-      : "=f"(fd_f)        \
-      : "f"(fs_f[i])      \
+#define UNOPff(op)               \
+   fd_f = 0;                     \
+   __asm__ __volatile__(         \
+      op"   %1, %2"   "\n\t"     \
+      "cfc1 %0, $31"  "\n\t"     \
+      : "=r" (fcsr), "=f"(fd_f)  \
+      : "f"(fs_f[i])             \
    );
 
-#define UNOPfd(op)        \
-   fd_d = 0;              \
-   __asm__ __volatile__(  \
-      op" %0, %1"  "\n\t" \
-      : "=f"(fd_d)        \
-      : "f"(fs_f[i])      \
+#define UNOPfd(op)               \
+   fd_d = 0;                     \
+   __asm__ __volatile__(         \
+      op"   %1, %2"   "\n\t"     \
+      "cfc1 %0, $31"  "\n\t"     \
+      : "=r" (fcsr), "=f"(fd_d)  \
+      : "f"(fs_f[i])             \
    );
 
-#define UNOPdf(op)        \
-   fd_f = 0;              \
-   __asm__ __volatile__(  \
-      op" %0, %1"  "\n\t" \
-      : "=f"(fd_f)        \
-      : "f"(fs_d[i])      \
+#define UNOPdf(op)               \
+   fd_f = 0;                     \
+   __asm__ __volatile__(         \
+      op"   %1, %2"   "\n\t"     \
+      "cfc1 %0, $31"  "\n\t"     \
+      : "=r" (fcsr), "=f"(fd_f)  \
+      : "f"(fs_d[i])             \
    );
 
-#define UNOPfw(op)             \
-   fd_w = 0;                   \
-   __asm__ __volatile__(       \
-      op"   $f0, %1"   "\n\t"  \
-      "mfc1 %0,  $f0"  "\n\t"  \
-      : "=r"(fd_w)             \
-      : "f"(fs_f[i])           \
-      : "$f0"                  \
+#define UNOPfw(op)               \
+   fd_w = 0;                     \
+   __asm__ __volatile__(         \
+      op"   $f0, %2"   "\n\t"    \
+      "mfc1 %1,  $f0"  "\n\t"    \
+      "cfc1 %0,  $31"  "\n\t"    \
+      : "=r" (fcsr), "=r"(fd_w)  \
+      : "f"(fs_f[i])             \
+      : "$f0"                    \
    );
 
-#define UNOPdw(op)             \
-   fd_w = 0;                   \
-   __asm__ __volatile__(       \
-      op"   $f0, %1"   "\n\t"  \
-      "mfc1 %0,  $f0"  "\n\t"  \
-      : "=r"(fd_w)             \
-      : "f"(fs_d[i])           \
-      : "$f0"                  \
+#define UNOPdw(op)               \
+   fd_w = 0;                     \
+   __asm__ __volatile__(         \
+      op"   $f0, %2"   "\n\t"    \
+      "mfc1 %1,  $f0"  "\n\t"    \
+      "cfc1 %0,  $31"  "\n\t"    \
+      : "=r" (fcsr), "=r"(fd_w)  \
+      : "f"(fs_d[i])             \
+      : "$f0"                    \
    );
 
-#define UNOPwd(op)            \
-   fd_d = 0;                  \
-   __asm__ __volatile__(      \
-      "mtc1 %1, $f0"  "\n\t"  \
-      op"   %0, $f0"  "\n\t"  \
-      : "=f"(fd_d)            \
-      : "r"(fs_w[i])          \
-      : "$f0"                 \
+#define UNOPwd(op)               \
+   fd_d = 0;                     \
+   __asm__ __volatile__(         \
+      "mtc1 %2,  $f0"  "\n\t"    \
+      op"   %1,  $f0"  "\n\t"    \
+      "cfc1 %0,  $31"  "\n\t"    \
+      : "=r" (fcsr), "=f"(fd_d)  \
+      : "r"(fs_w[i])             \
+      : "$f0"                    \
    );
 
-#define UNOPwf(op)            \
-   fd_f = 0;                  \
-   __asm__ __volatile__(      \
-      "mtc1 %1, $f0"  "\n\t"  \
-      op"   %0, $f0"  "\n\t"  \
-      : "=f"(fd_f)            \
-      : "r"(fs_w[i])          \
-      : "$f0"                 \
+#define UNOPwf(op)               \
+   fd_f = 0;                     \
+   __asm__ __volatile__(         \
+      "mtc1 %2,  $f0"  "\n\t"    \
+      op"   %1,  $f0"  "\n\t"    \
+      "cfc1 %0,  $31"  "\n\t"    \
+      : "=r" (fcsr), "=f"(fd_f)  \
+      : "r"(fs_w[i])             \
+      : "$f0"                    \
    );
 
-#define UNOPld(op)             \
-   fd_d = 0;                   \
-   __asm__ __volatile__(       \
-      "dmtc1 %1, $f0"  "\n\t"  \
-      op"    %0, $f0"  "\n\t"  \
-      : "=f"(fd_d)             \
-      : "r"(fs_l[i])           \
-      : "$f0"                  \
+#define UNOPld(op)               \
+   fd_d = 0;                     \
+   __asm__ __volatile__(         \
+      "dmtc1 %2, $f0"  "\n\t"    \
+      op"    %1, $f0"  "\n\t"    \
+      "cfc1  %0, $31"  "\n\t"    \
+      : "=r" (fcsr), "=f"(fd_d)  \
+      : "r"(fs_l[i])             \
+      : "$f0"                    \
    );
 
-#define UNOPdl(op)              \
-   fd_l = 0;                    \
-   __asm__ __volatile__(        \
-      op"    $f0, %1"   "\n\t"  \
-      "dmfc1 %0,  $f0"  "\n\t"  \
-      : "=r"(fd_l)              \
-      : "f"(fs_d[i])            \
-      : "$f0"                   \
+#define UNOPdl(op)               \
+   fd_l = 0;                     \
+   __asm__ __volatile__(         \
+      op"    $f0, %2"   "\n\t"   \
+      "dmfc1 %1,  $f0"  "\n\t"   \
+      "cfc1  %0,  $31"  "\n\t"   \
+      : "=r" (fcsr), "=r"(fd_l)  \
+      : "f"(fs_d[i])             \
+      : "$f0"                    \
    );
 
-#define UNOPls(op)             \
-   fd_f = 0;                   \
-   __asm__ __volatile__(       \
-      "dmtc1 %1, $f0"  "\n\t"  \
-      op"    %0, $f0"  "\n\t"  \
-      : "=f"(fd_f)             \
-      : "r"(fs_l[i])           \
-      : "$f0"                  \
+#define UNOPls(op)               \
+   fd_f = 0;                     \
+   __asm__ __volatile__(         \
+      "dmtc1 %2, $f0"  "\n\t"    \
+      op"    %1, $f0"  "\n\t"    \
+      "cfc1  %0, $31"  "\n\t"    \
+      : "=r" (fcsr), "=f"(fd_f)  \
+      : "r"(fs_l[i])             \
+      : "$f0"                    \
    );
 
-#define UNOPsl(op)              \
-   fd_l = 0;                    \
-   __asm__ __volatile__(        \
-      op"    $f0, %1"   "\n\t"  \
-      "dmfc1 %0,  $f0"  "\n\t"  \
-      : "=r"(fd_l)              \
-      : "f"(fs_f[i])            \
-      : "$f0"                   \
+#define UNOPsl(op)               \
+   fd_l = 0;                     \
+   __asm__ __volatile__(         \
+      op"    $f0, %2"   "\n\t"   \
+      "dmfc1 %1,  $f0"  "\n\t"   \
+      "cfc1  %0,  $31"  "\n\t"   \
+      : "=r" (fcsr), "=r"(fd_l)  \
+      : "f"(fs_f[i])             \
+      : "$f0"                    \
    );
 
 #define BINOPf(op)                    \
    fd_f = 0;                          \
    __asm__ __volatile__(              \
-      op" %0, %1, %2"  "\n\t"         \
-      : "=f" (fd_f)                   \
+      op"    %1, %2, %3"  "\n\t"      \
+      "cfc1  %0, $31"     "\n\t"      \
+      : "=r" (fcsr), "=f" (fd_f)      \
       : "f" (fs_f[i]), "f" (ft_f[i])  \
    );
 
 #define BINOPd(op)                    \
    fd_d = 0;                          \
    __asm__ __volatile__(              \
-      op" %0, %1, %2"  "\n\t"         \
-      : "=f"(fd_d)                    \
+      op" %1, %2, %3"  "\n\t"         \
+      "cfc1  %0, $31"     "\n\t"      \
+      : "=r" (fcsr), "=f"(fd_d)       \
       : "f" (fs_d[i]), "f" (ft_d[i])  \
    );
 
 #define TRIOPf(op)                                    \
    fd_f = 0;                                          \
    __asm__ __volatile__(                              \
-      op" %0, %1, %2, %3"  "\n\t"                     \
-      : "=f" (fd_f)                                   \
+      op"    %1, %2, %3, %4"  "\n\t"                  \
+      "cfc1  %0, $31"         "\n\t"                  \
+      : "=r" (fcsr), "=f" (fd_f)                      \
       : "f" (fr_f[i]), "f" (fs_f[i]) , "f" (ft_f[i])  \
    );
 
 #define TRIOPd(op)                                    \
    fd_d = 0;                                          \
    __asm__ __volatile__(                              \
-      op" %0, %1, %2, %3"  "\n\t"                     \
-      : "=f"(fd_d)                                    \
+      op"    %1, %2, %3, %4"  "\n\t"                  \
+      "cfc1  %0, $31"         "\n\t"                  \
+      : "=r" (fcsr), "=f"(fd_d)                       \
       : "f" (fr_d[i]), "f" (fs_d[i]) , "f" (ft_d[i])  \
    );
 

diff --git a/none/tests/mips64/round.c b/none/tests/mips64/round.c
index fc4e4f1ea447d5494d98d6d5d15940a8f0195f1e..5fb0fb4c497f68538912322b4bce0627915cb18f 100644 (file)
--- a/none/tests/mips64/round.c
+++ b/none/tests/mips64/round.c
@@ -6,71 +6,88 @@ int directedRoundingMode(flt_dir_op_t op) {
    int fd_w = 0;
    long long int fd_l = 0;
    int i;
+   int fcsr = 0;
    for (i = 0; i < MAX_ARR; i++) {
       switch(op) {
          case CEILWS:
               UNOPfw("ceil.w.s");
               printf("%s %d %f\n", flt_dir_op_names[op], fd_w, fs_f[i]);
+              printf("fcsr: 0x%x\n", fcsr);
               break;
          case CEILWD:
               UNOPdw("ceil.w.d");
               printf("%s %d %lf\n", flt_dir_op_names[op], fd_w, fs_d[i]);
+              printf("fcsr: 0x%x\n", fcsr);
               break;
          case FLOORWS:
               UNOPfw("floor.w.s");
               printf("%s %d %f\n", flt_dir_op_names[op], fd_w, fs_f[i]);
+              printf("fcsr: 0x%x\n", fcsr);
               break;
          case FLOORWD:
               UNOPdw("floor.w.d");
               printf("%s %d %lf\n", flt_dir_op_names[op], fd_w, fs_d[i]);
+              printf("fcsr: 0x%x\n", fcsr);
               break;
          case ROUNDWS:
               UNOPfw("round.w.s");
               printf("%s %d %f\n", flt_dir_op_names[op], fd_w, fs_f[i]);
+              printf("fcsr: 0x%x\n", fcsr);
               break;
          case ROUNDWD:
               UNOPdw("round.w.d");
               printf("%s %d %lf\n", flt_dir_op_names[op], fd_w, fs_d[i]);
+              printf("fcsr: 0x%x\n", fcsr);
               break;
          case TRUNCWS:
               UNOPfw("trunc.w.s");
               printf("%s %d %f\n", flt_dir_op_names[op], fd_w, fs_f[i]);
+              printf("fcsr: 0x%x\n", fcsr);
               break;
          case TRUNCWD:
               UNOPdw("trunc.w.d");
               printf("%s %d %lf\n", flt_dir_op_names[op], fd_w, fs_d[i]);
+              printf("fcsr: 0x%x\n", fcsr);
               break;
          case CEILLS:
               UNOPsl("ceil.l.s");
               printf("%s %lld %f\n", flt_dir_op_names[op], fd_l, fs_f[i]);
+              printf("fcsr: 0x%x\n", fcsr);
               break;
          case CEILLD:
               UNOPdl("ceil.l.d");
               printf("%s %lld %lf\n", flt_dir_op_names[op], fd_l, fs_d[i]);
+              printf("fcsr: 0x%x\n", fcsr);
               break;
          case FLOORLS:
               UNOPsl("floor.l.s");
               printf("%s %lld %f\n", flt_dir_op_names[op], fd_l, fs_f[i]);
+              printf("fcsr: 0x%x\n", fcsr);
               break;
          case FLOORLD:
               UNOPdl("floor.l.d");
               printf("%s %lld %lf\n", flt_dir_op_names[op], fd_l, fs_d[i]);
+              printf("fcsr: 0x%x\n", fcsr);
               break;
          case ROUNDLS:
               UNOPsl("round.l.s");
               printf("%s %lld %f\n", flt_dir_op_names[op], fd_l, fs_f[i]);
+              printf("fcsr: 0x%x\n", fcsr);
               break;
          case ROUNDLD:
               UNOPdl("round.l.d");
               printf("%s %lld %lf\n", flt_dir_op_names[op], fd_l, fs_d[i]);
+              printf("fcsr: 0x%x\n", fcsr);
               break;
          case TRUNCLS:
               UNOPsl("trunc.l.s");
               printf("%s %lld %f\n", flt_dir_op_names[op], fd_l, fs_f[i]);
+              printf("fcsr: 0x%x\n", fcsr);
               break;
          case TRUNCLD:
               UNOPdl("trunc.l.d");
               printf("%s %lld %lf\n", flt_dir_op_names[op], fd_l, fs_d[i]);
+              printf("fcsr: 0x%x\n", fcsr);
               break;
         default:
             printf("error\n");
@@ -87,6 +104,7 @@ int FCSRRoundingMode(flt_round_op_t op1)
    int fd_w = 0;
    long long int fd_l = 0;
    int i;
+   int fcsr = 0;
    round_mode_t rm;
    for (rm = TO_NEAREST; rm <= TO_MINUS_INFINITY; rm ++) {
       set_rounding_mode(rm);
@@ -97,42 +115,52 @@ int FCSRRoundingMode(flt_round_op_t op1)
             case CVTDS:
                  UNOPfd("cvt.d.s");
                  printf("%s %lf %lf\n", flt_round_op_names[op1], fd_d, fs_f[i]);
+                 printf("fcsr: 0x%x\n", fcsr);
                  break;
             case CVTDW:
                  UNOPwd("cvt.d.w");
                  printf("%s %lf %d\n", flt_round_op_names[op1], fd_d, fs_w[i]);
+                 printf("fcsr: 0x%x\n", fcsr);
                  break;
             case CVTSD:
                  UNOPdf("cvt.s.d");
                  printf("%s %f %lf\n", flt_round_op_names[op1], fd_f, fs_d[i]);
+                 printf("fcsr: 0x%x\n", fcsr);
                  break;
             case CVTSW:
                  UNOPwf("cvt.s.w");
                  printf("%s %f %d\n", flt_round_op_names[op1], fd_f, fs_w[i]);
+                 printf("fcsr: 0x%x\n", fcsr);
                  break;
             case CVTWS:
                  UNOPfw("cvt.w.s");
                  printf("%s %d %f\n", flt_round_op_names[op1], fd_w, fs_f[i]);
+                 printf("fcsr: 0x%x\n", fcsr);
                  break;
             case CVTWD:
                  UNOPdw("cvt.w.d");
                  printf("%s %d %lf\n", flt_round_op_names[op1], fd_w, fs_d[i]);
+                 printf("fcsr: 0x%x\n", fcsr);
                  break;
             case CVTDL:
                  UNOPld("cvt.d.l");
                  printf("%s %lf %ld\n", flt_round_op_names[op1], fd_d, fs_l[i]);
+                 printf("fcsr: 0x%x\n", fcsr);
                  break;
             case CVTLS:
                  UNOPsl("cvt.l.s");
                  printf("%s %lld %f\n", flt_round_op_names[op1], fd_l, fs_f[i]);
+                 printf("fcsr: 0x%x\n", fcsr);
                  break;
             case CVTLD:
                  UNOPdl("cvt.l.d");
                  printf("%s %lld %lf\n", flt_round_op_names[op1], fd_l, fs_d[i]);
+                 printf("fcsr: 0x%x\n", fcsr);
                  break;
             case CVTSL:
                  UNOPls("cvt.s.l");
                  printf("%s %f %ld\n", flt_round_op_names[op1], fd_f, fs_l[i]);
+                 printf("fcsr: 0x%x\n", fcsr);
                  break;
             default:
                  printf("error\n");

diff --git a/none/tests/mips64/round.stdout.exp b/none/tests/mips64/round.stdout.exp
index 3ff1ad21eadac32fa984e3223c55533a74d24cae..4eaea024988e0be3b720fabf6b06044fc3fc8c9d 100644 (file)
--- a/none/tests/mips64/round.stdout.exp
+++ b/none/tests/mips64/round.stdout.exp
@@ -1,1362 +1,2682 @@
 -------------------------- test FPU Conversion Operations Using a Directed Rounding Mode --------------------------
 ceil.w.s 0 0.000000
+fcsr: 0x0
 ceil.w.s 457 456.248962
+fcsr: 0x1004
 ceil.w.s 3 3.000000
+fcsr: 0x4
 ceil.w.s -1 -1.000000
+fcsr: 0x4
 ceil.w.s 1385 1384.599976
+fcsr: 0x1004
 ceil.w.s -7 -7.294568
+fcsr: 0x1004
 ceil.w.s 1000000000 1000000000.000000
+fcsr: 0x4
 ceil.w.s -5786 -5786.470215
+fcsr: 0x1004
 ceil.w.s 1752 1752.000000
+fcsr: 0x4
 ceil.w.s 1 0.002457
+fcsr: 0x1004
 ceil.w.s 1 0.123400
+fcsr: 0x1004
 ceil.w.s -248562 -248562.765625
+fcsr: 0x1004
 ceil.w.s -45786 -45786.476562
+fcsr: 0x1004
 ceil.w.s 457 456.248962
+fcsr: 0x1004
 ceil.w.s 35 34.000462
+fcsr: 0x1004
 ceil.w.s 45787 45786.476562
+fcsr: 0x1004
 ceil.w.s 1752065 1752065.000000
+fcsr: 0x4
 ceil.w.s 107 107.000000
+fcsr: 0x4
 ceil.w.s -45667 -45667.238281
+fcsr: 0x1004
 ceil.w.s -7 -7.294568
+fcsr: 0x1004
 ceil.w.s -347856 -347856.468750
+fcsr: 0x1004
 ceil.w.s 356048 356047.562500
+fcsr: 0x1004
 ceil.w.s -1 -1.000000
+fcsr: 0x4
 ceil.w.s 24 23.040001
+fcsr: 0x1004
 ceil.w.d 0 0.000000
+fcsr: 0x4
 ceil.w.d 457 456.248956
+fcsr: 0x1004
 ceil.w.d 3 3.000000
+fcsr: 0x4
 ceil.w.d -1 -1.000000
+fcsr: 0x4
 ceil.w.d 1385 1384.600000
+fcsr: 0x1004
 ceil.w.d -7 -7.294568
+fcsr: 0x1004
 ceil.w.d 1000000000 1000000000.000000
+fcsr: 0x4
 ceil.w.d -5786 -5786.470000
+fcsr: 0x1004
 ceil.w.d 1752 1752.000000
+fcsr: 0x4
 ceil.w.d 1 0.002458
+fcsr: 0x1004
 ceil.w.d 1 0.000000
+fcsr: 0x1004
 ceil.w.d -248562 -248562.760000
+fcsr: 0x1004
 ceil.w.d -45786 -45786.476000
+fcsr: 0x1004
 ceil.w.d 457 456.248956
+fcsr: 0x1004
 ceil.w.d 35 34.000460
+fcsr: 0x1004
 ceil.w.d 45787 45786.476000
+fcsr: 0x1004
 ceil.w.d 1752065 1752065.000000
+fcsr: 0x4
 ceil.w.d 107 107.000000
+fcsr: 0x4
 ceil.w.d -45667 -45667.240000
+fcsr: 0x1004
 ceil.w.d -7 -7.294568
+fcsr: 0x1004
 ceil.w.d -347856 -347856.475000
+fcsr: 0x1004
 ceil.w.d 356048 356047.560000
+fcsr: 0x1004
 ceil.w.d -1 -1.000000
+fcsr: 0x4
 ceil.w.d 24 23.040000
+fcsr: 0x1004
 floor.w.s 0 0.000000
+fcsr: 0x4
 floor.w.s 456 456.248962
+fcsr: 0x1004
 floor.w.s 3 3.000000
+fcsr: 0x4
 floor.w.s -1 -1.000000
+fcsr: 0x4
 floor.w.s 1384 1384.599976
+fcsr: 0x1004
 floor.w.s -8 -7.294568
+fcsr: 0x1004
 floor.w.s 1000000000 1000000000.000000
+fcsr: 0x4
 floor.w.s -5787 -5786.470215
+fcsr: 0x1004
 floor.w.s 1752 1752.000000
+fcsr: 0x4
 floor.w.s 0 0.002457
+fcsr: 0x1004
 floor.w.s 0 0.123400
+fcsr: 0x1004
 floor.w.s -248563 -248562.765625
+fcsr: 0x1004
 floor.w.s -45787 -45786.476562
+fcsr: 0x1004
 floor.w.s 456 456.248962
+fcsr: 0x1004
 floor.w.s 34 34.000462
+fcsr: 0x1004
 floor.w.s 45786 45786.476562
+fcsr: 0x1004
 floor.w.s 1752065 1752065.000000
+fcsr: 0x4
 floor.w.s 107 107.000000
+fcsr: 0x4
 floor.w.s -45668 -45667.238281
+fcsr: 0x1004
 floor.w.s -8 -7.294568
+fcsr: 0x1004
 floor.w.s -347857 -347856.468750
+fcsr: 0x1004
 floor.w.s 356047 356047.562500
+fcsr: 0x1004
 floor.w.s -1 -1.000000
+fcsr: 0x4
 floor.w.s 23 23.040001
+fcsr: 0x1004
 floor.w.d 0 0.000000
+fcsr: 0x4
 floor.w.d 456 456.248956
+fcsr: 0x1004
 floor.w.d 3 3.000000
+fcsr: 0x4
 floor.w.d -1 -1.000000
+fcsr: 0x4
 floor.w.d 1384 1384.600000
+fcsr: 0x1004
 floor.w.d -8 -7.294568
+fcsr: 0x1004
 floor.w.d 1000000000 1000000000.000000
+fcsr: 0x4
 floor.w.d -5787 -5786.470000
+fcsr: 0x1004
 floor.w.d 1752 1752.000000
+fcsr: 0x4
 floor.w.d 0 0.002458
+fcsr: 0x1004
 floor.w.d 0 0.000000
+fcsr: 0x1004
 floor.w.d -248563 -248562.760000
+fcsr: 0x1004
 floor.w.d -45787 -45786.476000
+fcsr: 0x1004
 floor.w.d 456 456.248956
+fcsr: 0x1004
 floor.w.d 34 34.000460
+fcsr: 0x1004
 floor.w.d 45786 45786.476000
+fcsr: 0x1004
 floor.w.d 1752065 1752065.000000
+fcsr: 0x4
 floor.w.d 107 107.000000
+fcsr: 0x4
 floor.w.d -45668 -45667.240000
+fcsr: 0x1004
 floor.w.d -8 -7.294568
+fcsr: 0x1004
 floor.w.d -347857 -347856.475000
+fcsr: 0x1004
 floor.w.d 356047 356047.560000
+fcsr: 0x1004
 floor.w.d -1 -1.000000
+fcsr: 0x4
 floor.w.d 23 23.040000
+fcsr: 0x1004
 round.w.s 0 0.000000
+fcsr: 0x4
 round.w.s 456 456.248962
+fcsr: 0x1004
 round.w.s 3 3.000000
+fcsr: 0x4
 round.w.s -1 -1.000000
+fcsr: 0x4
 round.w.s 1385 1384.599976
+fcsr: 0x1004
 round.w.s -7 -7.294568
+fcsr: 0x1004
 round.w.s 1000000000 1000000000.000000
+fcsr: 0x4
 round.w.s -5786 -5786.470215
+fcsr: 0x1004
 round.w.s 1752 1752.000000
+fcsr: 0x4
 round.w.s 0 0.002457
+fcsr: 0x1004
 round.w.s 0 0.123400
+fcsr: 0x1004
 round.w.s -248563 -248562.765625
+fcsr: 0x1004
 round.w.s -45786 -45786.476562
+fcsr: 0x1004
 round.w.s 456 456.248962
+fcsr: 0x1004
 round.w.s 34 34.000462
+fcsr: 0x1004
 round.w.s 45786 45786.476562
+fcsr: 0x1004
 round.w.s 1752065 1752065.000000
+fcsr: 0x4
 round.w.s 107 107.000000
+fcsr: 0x4
 round.w.s -45667 -45667.238281
+fcsr: 0x1004
 round.w.s -7 -7.294568
+fcsr: 0x1004
 round.w.s -347856 -347856.468750
+fcsr: 0x1004
 round.w.s 356048 356047.562500
+fcsr: 0x1004
 round.w.s -1 -1.000000
+fcsr: 0x4
 round.w.s 23 23.040001
+fcsr: 0x1004
 round.w.d 0 0.000000
+fcsr: 0x4
 round.w.d 456 456.248956
+fcsr: 0x1004
 round.w.d 3 3.000000
+fcsr: 0x4
 round.w.d -1 -1.000000
+fcsr: 0x4
 round.w.d 1385 1384.600000
+fcsr: 0x1004
 round.w.d -7 -7.294568
+fcsr: 0x1004
 round.w.d 1000000000 1000000000.000000
+fcsr: 0x4
 round.w.d -5786 -5786.470000
+fcsr: 0x1004
 round.w.d 1752 1752.000000
+fcsr: 0x4
 round.w.d 0 0.002458
+fcsr: 0x1004
 round.w.d 0 0.000000
+fcsr: 0x1004
 round.w.d -248563 -248562.760000
+fcsr: 0x1004
 round.w.d -45786 -45786.476000
+fcsr: 0x1004
 round.w.d 456 456.248956
+fcsr: 0x1004
 round.w.d 34 34.000460
+fcsr: 0x1004
 round.w.d 45786 45786.476000
+fcsr: 0x1004
 round.w.d 1752065 1752065.000000
+fcsr: 0x4
 round.w.d 107 107.000000
+fcsr: 0x4
 round.w.d -45667 -45667.240000
+fcsr: 0x1004
 round.w.d -7 -7.294568
+fcsr: 0x1004
 round.w.d -347856 -347856.475000
+fcsr: 0x1004
 round.w.d 356048 356047.560000
+fcsr: 0x1004
 round.w.d -1 -1.000000
+fcsr: 0x4
 round.w.d 23 23.040000
+fcsr: 0x1004
 trunc.w.s 0 0.000000
+fcsr: 0x4
 trunc.w.s 456 456.248962
+fcsr: 0x1004
 trunc.w.s 3 3.000000
+fcsr: 0x4
 trunc.w.s -1 -1.000000
+fcsr: 0x4
 trunc.w.s 1384 1384.599976
+fcsr: 0x1004
 trunc.w.s -7 -7.294568
+fcsr: 0x1004
 trunc.w.s 1000000000 1000000000.000000
+fcsr: 0x4
 trunc.w.s -5786 -5786.470215
+fcsr: 0x1004
 trunc.w.s 1752 1752.000000
+fcsr: 0x4
 trunc.w.s 0 0.002457
+fcsr: 0x1004
 trunc.w.s 0 0.123400
+fcsr: 0x1004
 trunc.w.s -248562 -248562.765625
+fcsr: 0x1004
 trunc.w.s -45786 -45786.476562
+fcsr: 0x1004
 trunc.w.s 456 456.248962
+fcsr: 0x1004
 trunc.w.s 34 34.000462
+fcsr: 0x1004
 trunc.w.s 45786 45786.476562
+fcsr: 0x1004
 trunc.w.s 1752065 1752065.000000
+fcsr: 0x4
 trunc.w.s 107 107.000000
+fcsr: 0x4
 trunc.w.s -45667 -45667.238281
+fcsr: 0x1004
 trunc.w.s -7 -7.294568
+fcsr: 0x1004
 trunc.w.s -347856 -347856.468750
+fcsr: 0x1004
 trunc.w.s 356047 356047.562500
+fcsr: 0x1004
 trunc.w.s -1 -1.000000
+fcsr: 0x4
 trunc.w.s 23 23.040001
+fcsr: 0x1004
 trunc.w.d 0 0.000000
+fcsr: 0x4
 trunc.w.d 456 456.248956
+fcsr: 0x1004
 trunc.w.d 3 3.000000
+fcsr: 0x4
 trunc.w.d -1 -1.000000
+fcsr: 0x4
 trunc.w.d 1384 1384.600000
+fcsr: 0x1004
 trunc.w.d -7 -7.294568
+fcsr: 0x1004
 trunc.w.d 1000000000 1000000000.000000
+fcsr: 0x4
 trunc.w.d -5786 -5786.470000
+fcsr: 0x1004
 trunc.w.d 1752 1752.000000
+fcsr: 0x4
 trunc.w.d 0 0.002458
+fcsr: 0x1004
 trunc.w.d 0 0.000000
+fcsr: 0x1004
 trunc.w.d -248562 -248562.760000
+fcsr: 0x1004
 trunc.w.d -45786 -45786.476000
+fcsr: 0x1004
 trunc.w.d 456 456.248956
+fcsr: 0x1004
 trunc.w.d 34 34.000460
+fcsr: 0x1004
 trunc.w.d 45786 45786.476000
+fcsr: 0x1004
 trunc.w.d 1752065 1752065.000000
+fcsr: 0x4
 trunc.w.d 107 107.000000
+fcsr: 0x4
 trunc.w.d -45667 -45667.240000
+fcsr: 0x1004
 trunc.w.d -7 -7.294568
+fcsr: 0x1004
 trunc.w.d -347856 -347856.475000
+fcsr: 0x1004
 trunc.w.d 356047 356047.560000
+fcsr: 0x1004
 trunc.w.d -1 -1.000000
+fcsr: 0x4
 trunc.w.d 23 23.040000
+fcsr: 0x1004
 ceil.l.s 0 0.000000
+fcsr: 0x4
 ceil.l.s 457 456.248962
+fcsr: 0x1004
 ceil.l.s 3 3.000000
+fcsr: 0x4
 ceil.l.s -1 -1.000000
+fcsr: 0x4
 ceil.l.s 1385 1384.599976
+fcsr: 0x1004
 ceil.l.s -7 -7.294568
+fcsr: 0x1004
 ceil.l.s 1000000000 1000000000.000000
+fcsr: 0x4
 ceil.l.s -5786 -5786.470215
+fcsr: 0x1004
 ceil.l.s 1752 1752.000000
+fcsr: 0x4
 ceil.l.s 1 0.002457
+fcsr: 0x1004
 ceil.l.s 1 0.123400
+fcsr: 0x1004
 ceil.l.s -248562 -248562.765625
+fcsr: 0x1004
 ceil.l.s -45786 -45786.476562
+fcsr: 0x1004
 ceil.l.s 457 456.248962
+fcsr: 0x1004
 ceil.l.s 35 34.000462
+fcsr: 0x1004
 ceil.l.s 45787 45786.476562
+fcsr: 0x1004
 ceil.l.s 1752065 1752065.000000
+fcsr: 0x4
 ceil.l.s 107 107.000000
+fcsr: 0x4
 ceil.l.s -45667 -45667.238281
+fcsr: 0x1004
 ceil.l.s -7 -7.294568
+fcsr: 0x1004
 ceil.l.s -347856 -347856.468750
+fcsr: 0x1004
 ceil.l.s 356048 356047.562500
+fcsr: 0x1004
 ceil.l.s -1 -1.000000
+fcsr: 0x4
 ceil.l.s 24 23.040001
+fcsr: 0x1004
 ceil.l.d 0 0.000000
+fcsr: 0x4
 ceil.l.d 457 456.248956
+fcsr: 0x1004
 ceil.l.d 3 3.000000
+fcsr: 0x4
 ceil.l.d -1 -1.000000
+fcsr: 0x4
 ceil.l.d 1385 1384.600000
+fcsr: 0x1004
 ceil.l.d -7 -7.294568
+fcsr: 0x1004
 ceil.l.d 1000000000 1000000000.000000
+fcsr: 0x4
 ceil.l.d -5786 -5786.470000
+fcsr: 0x1004
 ceil.l.d 1752 1752.000000
+fcsr: 0x4
 ceil.l.d 1 0.002458
+fcsr: 0x1004
 ceil.l.d 1 0.000000
+fcsr: 0x1004
 ceil.l.d -248562 -248562.760000
+fcsr: 0x1004
 ceil.l.d -45786 -45786.476000
+fcsr: 0x1004
 ceil.l.d 457 456.248956
+fcsr: 0x1004
 ceil.l.d 35 34.000460
+fcsr: 0x1004
 ceil.l.d 45787 45786.476000
+fcsr: 0x1004
 ceil.l.d 1752065 1752065.000000
+fcsr: 0x4
 ceil.l.d 107 107.000000
+fcsr: 0x4
 ceil.l.d -45667 -45667.240000
+fcsr: 0x1004
 ceil.l.d -7 -7.294568
+fcsr: 0x1004
 ceil.l.d -347856 -347856.475000
+fcsr: 0x1004
 ceil.l.d 356048 356047.560000
+fcsr: 0x1004
 ceil.l.d -1 -1.000000
+fcsr: 0x4
 ceil.l.d 24 23.040000
+fcsr: 0x1004
 floor.l.s 0 0.000000
+fcsr: 0x4
 floor.l.s 456 456.248962
+fcsr: 0x1004
 floor.l.s 3 3.000000
+fcsr: 0x4
 floor.l.s -1 -1.000000
+fcsr: 0x4
 floor.l.s 1384 1384.599976
+fcsr: 0x1004
 floor.l.s -8 -7.294568
+fcsr: 0x1004
 floor.l.s 1000000000 1000000000.000000
+fcsr: 0x4
 floor.l.s -5787 -5786.470215
+fcsr: 0x1004
 floor.l.s 1752 1752.000000
+fcsr: 0x4
 floor.l.s 0 0.002457
+fcsr: 0x1004
 floor.l.s 0 0.123400
+fcsr: 0x1004
 floor.l.s -248563 -248562.765625
+fcsr: 0x1004
 floor.l.s -45787 -45786.476562
+fcsr: 0x1004
 floor.l.s 456 456.248962
+fcsr: 0x1004
 floor.l.s 34 34.000462
+fcsr: 0x1004
 floor.l.s 45786 45786.476562
+fcsr: 0x1004
 floor.l.s 1752065 1752065.000000
+fcsr: 0x4
 floor.l.s 107 107.000000
+fcsr: 0x4
 floor.l.s -45668 -45667.238281
+fcsr: 0x1004
 floor.l.s -8 -7.294568
+fcsr: 0x1004
 floor.l.s -347857 -347856.468750
+fcsr: 0x1004
 floor.l.s 356047 356047.562500
+fcsr: 0x1004
 floor.l.s -1 -1.000000
+fcsr: 0x4
 floor.l.s 23 23.040001
+fcsr: 0x1004
 floor.l.d 0 0.000000
+fcsr: 0x4
 floor.l.d 456 456.248956
+fcsr: 0x1004
 floor.l.d 3 3.000000
+fcsr: 0x4
 floor.l.d -1 -1.000000
+fcsr: 0x4
 floor.l.d 1384 1384.600000
+fcsr: 0x1004
 floor.l.d -8 -7.294568
+fcsr: 0x1004
 floor.l.d 1000000000 1000000000.000000
+fcsr: 0x4
 floor.l.d -5787 -5786.470000
+fcsr: 0x1004
 floor.l.d 1752 1752.000000
+fcsr: 0x4
 floor.l.d 0 0.002458
+fcsr: 0x1004
 floor.l.d 0 0.000000
+fcsr: 0x1004
 floor.l.d -248563 -248562.760000
+fcsr: 0x1004
 floor.l.d -45787 -45786.476000
+fcsr: 0x1004
 floor.l.d 456 456.248956
+fcsr: 0x1004
 floor.l.d 34 34.000460
+fcsr: 0x1004
 floor.l.d 45786 45786.476000
+fcsr: 0x1004
 floor.l.d 1752065 1752065.000000
+fcsr: 0x4
 floor.l.d 107 107.000000
+fcsr: 0x4
 floor.l.d -45668 -45667.240000
+fcsr: 0x1004
 floor.l.d -8 -7.294568
+fcsr: 0x1004
 floor.l.d -347857 -347856.475000
+fcsr: 0x1004
 floor.l.d 356047 356047.560000
+fcsr: 0x1004
 floor.l.d -1 -1.000000
+fcsr: 0x4
 floor.l.d 23 23.040000
+fcsr: 0x1004
 round.l.s 0 0.000000
+fcsr: 0x4
 round.l.s 456 456.248962
+fcsr: 0x1004
 round.l.s 3 3.000000
+fcsr: 0x4
 round.l.s -1 -1.000000
+fcsr: 0x4
 round.l.s 1385 1384.599976
+fcsr: 0x1004
 round.l.s -7 -7.294568
+fcsr: 0x1004
 round.l.s 1000000000 1000000000.000000
+fcsr: 0x4
 round.l.s -5786 -5786.470215
+fcsr: 0x1004
 round.l.s 1752 1752.000000
+fcsr: 0x4
 round.l.s 0 0.002457
+fcsr: 0x1004
 round.l.s 0 0.123400
+fcsr: 0x1004
 round.l.s -248563 -248562.765625
+fcsr: 0x1004
 round.l.s -45786 -45786.476562
+fcsr: 0x1004
 round.l.s 456 456.248962
+fcsr: 0x1004
 round.l.s 34 34.000462
+fcsr: 0x1004
 round.l.s 45786 45786.476562
+fcsr: 0x1004
 round.l.s 1752065 1752065.000000
+fcsr: 0x4
 round.l.s 107 107.000000
+fcsr: 0x4
 round.l.s -45667 -45667.238281
+fcsr: 0x1004
 round.l.s -7 -7.294568
+fcsr: 0x1004
 round.l.s -347856 -347856.468750
+fcsr: 0x1004
 round.l.s 356048 356047.562500
+fcsr: 0x1004
 round.l.s -1 -1.000000
+fcsr: 0x4
 round.l.s 23 23.040001
+fcsr: 0x1004
 round.l.d 0 0.000000
+fcsr: 0x4
 round.l.d 456 456.248956
+fcsr: 0x1004
 round.l.d 3 3.000000
+fcsr: 0x4
 round.l.d -1 -1.000000
+fcsr: 0x4
 round.l.d 1385 1384.600000
+fcsr: 0x1004
 round.l.d -7 -7.294568
+fcsr: 0x1004
 round.l.d 1000000000 1000000000.000000
+fcsr: 0x4
 round.l.d -5786 -5786.470000
+fcsr: 0x1004
 round.l.d 1752 1752.000000
+fcsr: 0x4
 round.l.d 0 0.002458
+fcsr: 0x1004
 round.l.d 0 0.000000
+fcsr: 0x1004
 round.l.d -248563 -248562.760000
+fcsr: 0x1004
 round.l.d -45786 -45786.476000
+fcsr: 0x1004
 round.l.d 456 456.248956
+fcsr: 0x1004
 round.l.d 34 34.000460
+fcsr: 0x1004
 round.l.d 45786 45786.476000
+fcsr: 0x1004
 round.l.d 1752065 1752065.000000
+fcsr: 0x4
 round.l.d 107 107.000000
+fcsr: 0x4
 round.l.d -45667 -45667.240000
+fcsr: 0x1004
 round.l.d -7 -7.294568
+fcsr: 0x1004
 round.l.d -347856 -347856.475000
+fcsr: 0x1004
 round.l.d 356048 356047.560000
+fcsr: 0x1004
 round.l.d -1 -1.000000
+fcsr: 0x4
 round.l.d 23 23.040000
+fcsr: 0x1004
 trunc.l.s 0 0.000000
+fcsr: 0x4
 trunc.l.s 456 456.248962
+fcsr: 0x1004
 trunc.l.s 3 3.000000
+fcsr: 0x4
 trunc.l.s -1 -1.000000
+fcsr: 0x4
 trunc.l.s 1384 1384.599976
+fcsr: 0x1004
 trunc.l.s -7 -7.294568
+fcsr: 0x1004
 trunc.l.s 1000000000 1000000000.000000
+fcsr: 0x4
 trunc.l.s -5786 -5786.470215
+fcsr: 0x1004
 trunc.l.s 1752 1752.000000
+fcsr: 0x4
 trunc.l.s 0 0.002457
+fcsr: 0x1004
 trunc.l.s 0 0.123400
+fcsr: 0x1004
 trunc.l.s -248562 -248562.765625
+fcsr: 0x1004
 trunc.l.s -45786 -45786.476562
+fcsr: 0x1004
 trunc.l.s 456 456.248962
+fcsr: 0x1004
 trunc.l.s 34 34.000462
+fcsr: 0x1004
 trunc.l.s 45786 45786.476562
+fcsr: 0x1004
 trunc.l.s 1752065 1752065.000000
+fcsr: 0x4
 trunc.l.s 107 107.000000
+fcsr: 0x4
 trunc.l.s -45667 -45667.238281
+fcsr: 0x1004
 trunc.l.s -7 -7.294568
+fcsr: 0x1004
 trunc.l.s -347856 -347856.468750
+fcsr: 0x1004
 trunc.l.s 356047 356047.562500
+fcsr: 0x1004
 trunc.l.s -1 -1.000000
+fcsr: 0x4
 trunc.l.s 23 23.040001
+fcsr: 0x1004
 -------------------------- test FPU Conversion Operations Using the FCSR Rounding Mode --------------------------
 roundig mode: near
 cvt.d.s 0.000000 0.000000
+fcsr: 0x4
 cvt.d.s 456.248962 456.248962
+fcsr: 0x4
 cvt.d.s 3.000000 3.000000
+fcsr: 0x4
 cvt.d.s -1.000000 -1.000000
+fcsr: 0x4
 cvt.d.s 1384.599976 1384.599976
+fcsr: 0x4
 cvt.d.s -7.294568 -7.294568
+fcsr: 0x4
 cvt.d.s 1000000000.000000 1000000000.000000
+fcsr: 0x4
 cvt.d.s -5786.470215 -5786.470215
+fcsr: 0x4
 cvt.d.s 1752.000000 1752.000000
+fcsr: 0x4
 cvt.d.s 0.002457 0.002457
+fcsr: 0x4
 cvt.d.s 0.123400 0.123400
+fcsr: 0x4
 cvt.d.s -248562.765625 -248562.765625
+fcsr: 0x4
 cvt.d.s -45786.476562 -45786.476562
+fcsr: 0x4
 cvt.d.s 456.248962 456.248962
+fcsr: 0x4
 cvt.d.s 34.000462 34.000462
+fcsr: 0x4
 cvt.d.s 45786.476562 45786.476562
+fcsr: 0x4
 cvt.d.s 1752065.000000 1752065.000000
+fcsr: 0x4
 cvt.d.s 107.000000 107.000000
+fcsr: 0x4
 cvt.d.s -45667.238281 -45667.238281
+fcsr: 0x4
 cvt.d.s -7.294568 -7.294568
+fcsr: 0x4
 cvt.d.s -347856.468750 -347856.468750
+fcsr: 0x4
 cvt.d.s 356047.562500 356047.562500
+fcsr: 0x4
 cvt.d.s -1.000000 -1.000000
+fcsr: 0x4
 cvt.d.s 23.040001 23.040001
+fcsr: 0x4
 roundig mode: zero
 cvt.d.s 0.000000 0.000000
+fcsr: 0x5
 cvt.d.s 456.248962 456.248962
+fcsr: 0x5
 cvt.d.s 3.000000 3.000000
+fcsr: 0x5
 cvt.d.s -1.000000 -1.000000
+fcsr: 0x5
 cvt.d.s 1384.599976 1384.599976
+fcsr: 0x5
 cvt.d.s -7.294568 -7.294568
+fcsr: 0x5
 cvt.d.s 1000000000.000000 1000000000.000000
+fcsr: 0x5
 cvt.d.s -5786.470215 -5786.470215
+fcsr: 0x5
 cvt.d.s 1752.000000 1752.000000
+fcsr: 0x5
 cvt.d.s 0.002457 0.002457
+fcsr: 0x5
 cvt.d.s 0.123400 0.123400
+fcsr: 0x5
 cvt.d.s -248562.765625 -248562.765625
+fcsr: 0x5
 cvt.d.s -45786.476562 -45786.476562
+fcsr: 0x5
 cvt.d.s 456.248962 456.248962
+fcsr: 0x5
 cvt.d.s 34.000462 34.000462
+fcsr: 0x5
 cvt.d.s 45786.476562 45786.476562
+fcsr: 0x5
 cvt.d.s 1752065.000000 1752065.000000
+fcsr: 0x5
 cvt.d.s 107.000000 107.000000
+fcsr: 0x5
 cvt.d.s -45667.238281 -45667.238281
+fcsr: 0x5
 cvt.d.s -7.294568 -7.294568
+fcsr: 0x5
 cvt.d.s -347856.468750 -347856.468750
+fcsr: 0x5
 cvt.d.s 356047.562500 356047.562500
+fcsr: 0x5
 cvt.d.s -1.000000 -1.000000
+fcsr: 0x5
 cvt.d.s 23.040001 23.040001
+fcsr: 0x5
 roundig mode: +inf
 cvt.d.s 0.000000 0.000000
+fcsr: 0x6
 cvt.d.s 456.248962 456.248962
+fcsr: 0x6
 cvt.d.s 3.000000 3.000000
+fcsr: 0x6
 cvt.d.s -1.000000 -1.000000
+fcsr: 0x6
 cvt.d.s 1384.599976 1384.599976
+fcsr: 0x6
 cvt.d.s -7.294568 -7.294568
+fcsr: 0x6
 cvt.d.s 1000000000.000000 1000000000.000000
+fcsr: 0x6
 cvt.d.s -5786.470215 -5786.470215
+fcsr: 0x6
 cvt.d.s 1752.000000 1752.000000
+fcsr: 0x6
 cvt.d.s 0.002457 0.002457
+fcsr: 0x6
 cvt.d.s 0.123400 0.123400
+fcsr: 0x6
 cvt.d.s -248562.765625 -248562.765625
+fcsr: 0x6
 cvt.d.s -45786.476562 -45786.476562
+fcsr: 0x6
 cvt.d.s 456.248962 456.248962
+fcsr: 0x6
 cvt.d.s 34.000462 34.000462
+fcsr: 0x6
 cvt.d.s 45786.476562 45786.476562
+fcsr: 0x6
 cvt.d.s 1752065.000000 1752065.000000
+fcsr: 0x6
 cvt.d.s 107.000000 107.000000
+fcsr: 0x6
 cvt.d.s -45667.238281 -45667.238281
+fcsr: 0x6
 cvt.d.s -7.294568 -7.294568
+fcsr: 0x6
 cvt.d.s -347856.468750 -347856.468750
+fcsr: 0x6
 cvt.d.s 356047.562500 356047.562500
+fcsr: 0x6
 cvt.d.s -1.000000 -1.000000
+fcsr: 0x6
 cvt.d.s 23.040001 23.040001
+fcsr: 0x6
 roundig mode: -inf
 cvt.d.s 0.000000 0.000000
+fcsr: 0x7
 cvt.d.s 456.248962 456.248962
+fcsr: 0x7
 cvt.d.s 3.000000 3.000000
+fcsr: 0x7
 cvt.d.s -1.000000 -1.000000
+fcsr: 0x7
 cvt.d.s 1384.599976 1384.599976
+fcsr: 0x7
 cvt.d.s -7.294568 -7.294568
+fcsr: 0x7
 cvt.d.s 1000000000.000000 1000000000.000000
+fcsr: 0x7
 cvt.d.s -5786.470215 -5786.470215
+fcsr: 0x7
 cvt.d.s 1752.000000 1752.000000
+fcsr: 0x7
 cvt.d.s 0.002457 0.002457
+fcsr: 0x7
 cvt.d.s 0.123400 0.123400
+fcsr: 0x7
 cvt.d.s -248562.765625 -248562.765625
+fcsr: 0x7
 cvt.d.s -45786.476562 -45786.476562
+fcsr: 0x7
 cvt.d.s 456.248962 456.248962
+fcsr: 0x7
 cvt.d.s 34.000462 34.000462
+fcsr: 0x7
 cvt.d.s 45786.476562 45786.476562
+fcsr: 0x7
 cvt.d.s 1752065.000000 1752065.000000
+fcsr: 0x7
 cvt.d.s 107.000000 107.000000
+fcsr: 0x7
 cvt.d.s -45667.238281 -45667.238281
+fcsr: 0x7
 cvt.d.s -7.294568 -7.294568
+fcsr: 0x7
 cvt.d.s -347856.468750 -347856.468750
+fcsr: 0x7
 cvt.d.s 356047.562500 356047.562500
+fcsr: 0x7
 cvt.d.s -1.000000 -1.000000
+fcsr: 0x7
 cvt.d.s 23.040001 23.040001
+fcsr: 0x7
 roundig mode: near
 cvt.d.w 0.000000 0
+fcsr: 0x4
 cvt.d.w 456.000000 456
+fcsr: 0x4
 cvt.d.w 3.000000 3
+fcsr: 0x4
 cvt.d.w -1.000000 -1
+fcsr: 0x4
 cvt.d.w -1.000000 -1
+fcsr: 0x4
 cvt.d.w 356.000000 356
+fcsr: 0x4
 cvt.d.w 1000000000.000000 1000000000
+fcsr: 0x4
 cvt.d.w -5786.000000 -5786
+fcsr: 0x4
 cvt.d.w 1752.000000 1752
+fcsr: 0x4
 cvt.d.w 24575.000000 24575
+fcsr: 0x4
 cvt.d.w 10.000000 10
+fcsr: 0x4
 cvt.d.w -248562.000000 -248562
+fcsr: 0x4
 cvt.d.w -45786.000000 -45786
+fcsr: 0x4
 cvt.d.w 456.000000 456
+fcsr: 0x4
 cvt.d.w 34.000000 34
+fcsr: 0x4
 cvt.d.w 45786.000000 45786
+fcsr: 0x4
 cvt.d.w 1752065.000000 1752065
+fcsr: 0x4
 cvt.d.w 107.000000 107
+fcsr: 0x4
 cvt.d.w -45667.000000 -45667
+fcsr: 0x4
 cvt.d.w -7.000000 -7
+fcsr: 0x4
 cvt.d.w -347856.000000 -347856
+fcsr: 0x4
 cvt.d.w -2147483648.000000 -2147483648
+fcsr: 0x4
 cvt.d.w 268435455.000000 268435455
+fcsr: 0x4
 cvt.d.w 23.000000 23
+fcsr: 0x4
 roundig mode: zero
 cvt.d.w 0.000000 0
+fcsr: 0x5
 cvt.d.w 456.000000 456
+fcsr: 0x5
 cvt.d.w 3.000000 3
+fcsr: 0x5
 cvt.d.w -1.000000 -1
+fcsr: 0x5
 cvt.d.w -1.000000 -1
+fcsr: 0x5
 cvt.d.w 356.000000 356
+fcsr: 0x5
 cvt.d.w 1000000000.000000 1000000000
+fcsr: 0x5
 cvt.d.w -5786.000000 -5786
+fcsr: 0x5
 cvt.d.w 1752.000000 1752
+fcsr: 0x5
 cvt.d.w 24575.000000 24575
+fcsr: 0x5
 cvt.d.w 10.000000 10
+fcsr: 0x5
 cvt.d.w -248562.000000 -248562
+fcsr: 0x5
 cvt.d.w -45786.000000 -45786
+fcsr: 0x5
 cvt.d.w 456.000000 456
+fcsr: 0x5
 cvt.d.w 34.000000 34
+fcsr: 0x5
 cvt.d.w 45786.000000 45786
+fcsr: 0x5
 cvt.d.w 1752065.000000 1752065
+fcsr: 0x5
 cvt.d.w 107.000000 107
+fcsr: 0x5
 cvt.d.w -45667.000000 -45667
+fcsr: 0x5
 cvt.d.w -7.000000 -7
+fcsr: 0x5
 cvt.d.w -347856.000000 -347856
+fcsr: 0x5
 cvt.d.w -2147483648.000000 -2147483648
+fcsr: 0x5
 cvt.d.w 268435455.000000 268435455
+fcsr: 0x5
 cvt.d.w 23.000000 23
+fcsr: 0x5
 roundig mode: +inf
 cvt.d.w 0.000000 0
+fcsr: 0x6
 cvt.d.w 456.000000 456
+fcsr: 0x6
 cvt.d.w 3.000000 3
+fcsr: 0x6
 cvt.d.w -1.000000 -1
+fcsr: 0x6
 cvt.d.w -1.000000 -1
+fcsr: 0x6
 cvt.d.w 356.000000 356
+fcsr: 0x6
 cvt.d.w 1000000000.000000 1000000000
+fcsr: 0x6
 cvt.d.w -5786.000000 -5786
+fcsr: 0x6
 cvt.d.w 1752.000000 1752
+fcsr: 0x6
 cvt.d.w 24575.000000 24575
+fcsr: 0x6
 cvt.d.w 10.000000 10
+fcsr: 0x6
 cvt.d.w -248562.000000 -248562
+fcsr: 0x6
 cvt.d.w -45786.000000 -45786
+fcsr: 0x6
 cvt.d.w 456.000000 456
+fcsr: 0x6
 cvt.d.w 34.000000 34
+fcsr: 0x6
 cvt.d.w 45786.000000 45786
+fcsr: 0x6
 cvt.d.w 1752065.000000 1752065
+fcsr: 0x6
 cvt.d.w 107.000000 107
+fcsr: 0x6
 cvt.d.w -45667.000000 -45667
+fcsr: 0x6
 cvt.d.w -7.000000 -7
+fcsr: 0x6
 cvt.d.w -347856.000000 -347856
+fcsr: 0x6
 cvt.d.w -2147483648.000000 -2147483648
+fcsr: 0x6
 cvt.d.w 268435455.000000 268435455
+fcsr: 0x6
 cvt.d.w 23.000000 23
+fcsr: 0x6
 roundig mode: -inf
 cvt.d.w 0.000000 0
+fcsr: 0x7
 cvt.d.w 456.000000 456
+fcsr: 0x7
 cvt.d.w 3.000000 3
+fcsr: 0x7
 cvt.d.w -1.000000 -1
+fcsr: 0x7
 cvt.d.w -1.000000 -1
+fcsr: 0x7
 cvt.d.w 356.000000 356
+fcsr: 0x7
 cvt.d.w 1000000000.000000 1000000000
+fcsr: 0x7
 cvt.d.w -5786.000000 -5786
+fcsr: 0x7
 cvt.d.w 1752.000000 1752
+fcsr: 0x7
 cvt.d.w 24575.000000 24575
+fcsr: 0x7
 cvt.d.w 10.000000 10
+fcsr: 0x7
 cvt.d.w -248562.000000 -248562
+fcsr: 0x7
 cvt.d.w -45786.000000 -45786
+fcsr: 0x7
 cvt.d.w 456.000000 456
+fcsr: 0x7
 cvt.d.w 34.000000 34
+fcsr: 0x7
 cvt.d.w 45786.000000 45786
+fcsr: 0x7
 cvt.d.w 1752065.000000 1752065
+fcsr: 0x7
 cvt.d.w 107.000000 107
+fcsr: 0x7
 cvt.d.w -45667.000000 -45667
+fcsr: 0x7
 cvt.d.w -7.000000 -7
+fcsr: 0x7
 cvt.d.w -347856.000000 -347856
+fcsr: 0x7
 cvt.d.w -2147483648.000000 -2147483648
+fcsr: 0x7
 cvt.d.w 268435455.000000 268435455
+fcsr: 0x7
 cvt.d.w 23.000000 23
+fcsr: 0x7
 roundig mode: near
 cvt.s.d 0.000000 0.000000
+fcsr: 0x4
 cvt.s.d 456.248962 456.248956
+fcsr: 0x1004
 cvt.s.d 3.000000 3.000000
+fcsr: 0x4
 cvt.s.d -1.000000 -1.000000
+fcsr: 0x4
 cvt.s.d 1384.599976 1384.600000
+fcsr: 0x1004
 cvt.s.d -7.294568 -7.294568
+fcsr: 0x1004
 cvt.s.d 1000000000.000000 1000000000.000000
+fcsr: 0x4
 cvt.s.d -5786.470215 -5786.470000
+fcsr: 0x1004
 cvt.s.d 1752.000000 1752.000000
+fcsr: 0x4
 cvt.s.d 0.002457 0.002458
+fcsr: 0x1004
 cvt.s.d 0.000000 0.000000
+fcsr: 0x1004
 cvt.s.d -248562.765625 -248562.760000
+fcsr: 0x1004
 cvt.s.d -45786.476562 -45786.476000
+fcsr: 0x1004
 cvt.s.d 456.248962 456.248956
+fcsr: 0x1004
 cvt.s.d 34.000462 34.000460
+fcsr: 0x1004
 cvt.s.d 45786.476562 45786.476000
+fcsr: 0x1004
 cvt.s.d 1752065.000000 1752065.000000
+fcsr: 0x4
 cvt.s.d 107.000000 107.000000
+fcsr: 0x4
 cvt.s.d -45667.238281 -45667.240000
+fcsr: 0x1004
 cvt.s.d -7.294568 -7.294568
+fcsr: 0x1004
 cvt.s.d -347856.468750 -347856.475000
+fcsr: 0x1004
 cvt.s.d 356047.562500 356047.560000
+fcsr: 0x1004
 cvt.s.d -1.000000 -1.000000
+fcsr: 0x4
 cvt.s.d 23.040001 23.040000
+fcsr: 0x1004
 roundig mode: zero
 cvt.s.d 0.000000 0.000000
+fcsr: 0x5
 cvt.s.d 456.248932 456.248956
+fcsr: 0x1005
 cvt.s.d 3.000000 3.000000
+fcsr: 0x5
 cvt.s.d -1.000000 -1.000000
+fcsr: 0x5
 cvt.s.d 1384.599976 1384.600000
+fcsr: 0x1005
 cvt.s.d -7.294568 -7.294568
+fcsr: 0x1005
 cvt.s.d 1000000000.000000 1000000000.000000
+fcsr: 0x5
 cvt.s.d -5786.469727 -5786.470000
+fcsr: 0x1005
 cvt.s.d 1752.000000 1752.000000
+fcsr: 0x5
 cvt.s.d 0.002457 0.002458
+fcsr: 0x1005
 cvt.s.d 0.000000 0.000000
+fcsr: 0x1005
 cvt.s.d -248562.750000 -248562.760000
+fcsr: 0x1005
 cvt.s.d -45786.472656 -45786.476000
+fcsr: 0x1005
 cvt.s.d 456.248932 456.248956
+fcsr: 0x1005
 cvt.s.d 34.000458 34.000460
+fcsr: 0x1005
 cvt.s.d 45786.472656 45786.476000
+fcsr: 0x1005
 cvt.s.d 1752065.000000 1752065.000000
+fcsr: 0x5
 cvt.s.d 107.000000 107.000000
+fcsr: 0x5
 cvt.s.d -45667.238281 -45667.240000
+fcsr: 0x1005
 cvt.s.d -7.294568 -7.294568
+fcsr: 0x1005
 cvt.s.d -347856.468750 -347856.475000
+fcsr: 0x1005
 cvt.s.d 356047.531250 356047.560000
+fcsr: 0x1005
 cvt.s.d -1.000000 -1.000000
+fcsr: 0x5
 cvt.s.d 23.039999 23.040000
+fcsr: 0x1005
 roundig mode: +inf
 cvt.s.d 0.000000 0.000000
+fcsr: 0x6
 cvt.s.d 456.248962 456.248956
+fcsr: 0x1006
 cvt.s.d 3.000000 3.000000
+fcsr: 0x6
 cvt.s.d -1.000000 -1.000000
+fcsr: 0x6
 cvt.s.d 1384.600098 1384.600000
+fcsr: 0x1006
 cvt.s.d -7.294568 -7.294568
+fcsr: 0x1006
 cvt.s.d 1000000000.000000 1000000000.000000
+fcsr: 0x6
 cvt.s.d -5786.469727 -5786.470000
+fcsr: 0x1006
 cvt.s.d 1752.000000 1752.000000
+fcsr: 0x6
 cvt.s.d 0.002458 0.002458
+fcsr: 0x1006
 cvt.s.d 0.000000 0.000000
+fcsr: 0x1006
 cvt.s.d -248562.750000 -248562.760000
+fcsr: 0x1006
 cvt.s.d -45786.472656 -45786.476000
+fcsr: 0x1006
 cvt.s.d 456.248962 456.248956
+fcsr: 0x1006
 cvt.s.d 34.000462 34.000460
+fcsr: 0x1006
 cvt.s.d 45786.476562 45786.476000
+fcsr: 0x1006
 cvt.s.d 1752065.000000 1752065.000000
+fcsr: 0x6
 cvt.s.d 107.000000 107.000000
+fcsr: 0x6
 cvt.s.d -45667.238281 -45667.240000
+fcsr: 0x1006
 cvt.s.d -7.294568 -7.294568
+fcsr: 0x1006
 cvt.s.d -347856.468750 -347856.475000
+fcsr: 0x1006
 cvt.s.d 356047.562500 356047.560000
+fcsr: 0x1006
 cvt.s.d -1.000000 -1.000000
+fcsr: 0x6
 cvt.s.d 23.040001 23.040000
+fcsr: 0x1006
 roundig mode: -inf
 cvt.s.d 0.000000 0.000000
+fcsr: 0x7
 cvt.s.d 456.248932 456.248956
+fcsr: 0x1007
 cvt.s.d 3.000000 3.000000
+fcsr: 0x7
 cvt.s.d -1.000000 -1.000000
+fcsr: 0x7
 cvt.s.d 1384.599976 1384.600000
+fcsr: 0x1007
 cvt.s.d -7.294568 -7.294568
+fcsr: 0x1007
 cvt.s.d 1000000000.000000 1000000000.000000
+fcsr: 0x7
 cvt.s.d -5786.470215 -5786.470000
+fcsr: 0x1007
 cvt.s.d 1752.000000 1752.000000
+fcsr: 0x7
 cvt.s.d 0.002457 0.002458
+fcsr: 0x1007
 cvt.s.d 0.000000 0.000000
+fcsr: 0x1007
 cvt.s.d -248562.765625 -248562.760000
+fcsr: 0x1007
 cvt.s.d -45786.476562 -45786.476000
+fcsr: 0x1007
 cvt.s.d 456.248932 456.248956
+fcsr: 0x1007
 cvt.s.d 34.000458 34.000460
+fcsr: 0x1007
 cvt.s.d 45786.472656 45786.476000
+fcsr: 0x1007
 cvt.s.d 1752065.000000 1752065.000000
+fcsr: 0x7
 cvt.s.d 107.000000 107.000000
+fcsr: 0x7
 cvt.s.d -45667.242188 -45667.240000
+fcsr: 0x1007
 cvt.s.d -7.294568 -7.294568
+fcsr: 0x1007
 cvt.s.d -347856.500000 -347856.475000
+fcsr: 0x1007
 cvt.s.d 356047.531250 356047.560000
+fcsr: 0x1007
 cvt.s.d -1.000000 -1.000000
+fcsr: 0x7
 cvt.s.d 23.039999 23.040000
+fcsr: 0x1007
 roundig mode: near
 cvt.s.w 0.000000 0
+fcsr: 0x4
 cvt.s.w 456.000000 456
+fcsr: 0x4
 cvt.s.w 3.000000 3
+fcsr: 0x4
 cvt.s.w -1.000000 -1
+fcsr: 0x4
 cvt.s.w -1.000000 -1
+fcsr: 0x4
 cvt.s.w 356.000000 356
+fcsr: 0x4
 cvt.s.w 1000000000.000000 1000000000
+fcsr: 0x4
 cvt.s.w -5786.000000 -5786
+fcsr: 0x4
 cvt.s.w 1752.000000 1752
+fcsr: 0x4
 cvt.s.w 24575.000000 24575
+fcsr: 0x4
 cvt.s.w 10.000000 10
+fcsr: 0x4
 cvt.s.w -248562.000000 -248562
+fcsr: 0x4
 cvt.s.w -45786.000000 -45786
+fcsr: 0x4
 cvt.s.w 456.000000 456
+fcsr: 0x4
 cvt.s.w 34.000000 34
+fcsr: 0x4
 cvt.s.w 45786.000000 45786
+fcsr: 0x4
 cvt.s.w 1752065.000000 1752065
+fcsr: 0x4
 cvt.s.w 107.000000 107
+fcsr: 0x4
 cvt.s.w -45667.000000 -45667
+fcsr: 0x4
 cvt.s.w -7.000000 -7
+fcsr: 0x4
 cvt.s.w -347856.000000 -347856
+fcsr: 0x4
 cvt.s.w -2147483648.000000 -2147483648
+fcsr: 0x4
 cvt.s.w 268435456.000000 268435455
+fcsr: 0x1004
 cvt.s.w 23.000000 23
+fcsr: 0x4
 roundig mode: zero
 cvt.s.w 0.000000 0
+fcsr: 0x5
 cvt.s.w 456.000000 456
+fcsr: 0x5
 cvt.s.w 3.000000 3
+fcsr: 0x5
 cvt.s.w -1.000000 -1
+fcsr: 0x5
 cvt.s.w -1.000000 -1
+fcsr: 0x5
 cvt.s.w 356.000000 356
+fcsr: 0x5
 cvt.s.w 1000000000.000000 1000000000
+fcsr: 0x5
 cvt.s.w -5786.000000 -5786
+fcsr: 0x5
 cvt.s.w 1752.000000 1752
+fcsr: 0x5
 cvt.s.w 24575.000000 24575
+fcsr: 0x5
 cvt.s.w 10.000000 10
+fcsr: 0x5
 cvt.s.w -248562.000000 -248562
+fcsr: 0x5
 cvt.s.w -45786.000000 -45786
+fcsr: 0x5
 cvt.s.w 456.000000 456
+fcsr: 0x5
 cvt.s.w 34.000000 34
+fcsr: 0x5
 cvt.s.w 45786.000000 45786
+fcsr: 0x5
 cvt.s.w 1752065.000000 1752065
+fcsr: 0x5
 cvt.s.w 107.000000 107
+fcsr: 0x5
 cvt.s.w -45667.000000 -45667
+fcsr: 0x5
 cvt.s.w -7.000000 -7
+fcsr: 0x5
 cvt.s.w -347856.000000 -347856
+fcsr: 0x5
 cvt.s.w -2147483648.000000 -2147483648
+fcsr: 0x5
 cvt.s.w 268435440.000000 268435455
+fcsr: 0x1005
 cvt.s.w 23.000000 23
+fcsr: 0x5
 roundig mode: +inf
 cvt.s.w 0.000000 0
+fcsr: 0x6
 cvt.s.w 456.000000 456
+fcsr: 0x6
 cvt.s.w 3.000000 3
+fcsr: 0x6
 cvt.s.w -1.000000 -1
+fcsr: 0x6
 cvt.s.w -1.000000 -1
+fcsr: 0x6
 cvt.s.w 356.000000 356
+fcsr: 0x6
 cvt.s.w 1000000000.000000 1000000000
+fcsr: 0x6
 cvt.s.w -5786.000000 -5786
+fcsr: 0x6
 cvt.s.w 1752.000000 1752
+fcsr: 0x6
 cvt.s.w 24575.000000 24575
+fcsr: 0x6
 cvt.s.w 10.000000 10
+fcsr: 0x6
 cvt.s.w -248562.000000 -248562
+fcsr: 0x6
 cvt.s.w -45786.000000 -45786
+fcsr: 0x6
 cvt.s.w 456.000000 456
+fcsr: 0x6
 cvt.s.w 34.000000 34
+fcsr: 0x6
 cvt.s.w 45786.000000 45786
+fcsr: 0x6
 cvt.s.w 1752065.000000 1752065
+fcsr: 0x6
 cvt.s.w 107.000000 107
+fcsr: 0x6
 cvt.s.w -45667.000000 -45667
+fcsr: 0x6
 cvt.s.w -7.000000 -7
+fcsr: 0x6
 cvt.s.w -347856.000000 -347856
+fcsr: 0x6
 cvt.s.w -2147483648.000000 -2147483648
+fcsr: 0x6
 cvt.s.w 268435456.000000 268435455
+fcsr: 0x1006
 cvt.s.w 23.000000 23
+fcsr: 0x6
 roundig mode: -inf
 cvt.s.w 0.000000 0
+fcsr: 0x7
 cvt.s.w 456.000000 456
+fcsr: 0x7
 cvt.s.w 3.000000 3
+fcsr: 0x7
 cvt.s.w -1.000000 -1
+fcsr: 0x7
 cvt.s.w -1.000000 -1
+fcsr: 0x7
 cvt.s.w 356.000000 356
+fcsr: 0x7
 cvt.s.w 1000000000.000000 1000000000
+fcsr: 0x7
 cvt.s.w -5786.000000 -5786
+fcsr: 0x7
 cvt.s.w 1752.000000 1752
+fcsr: 0x7
 cvt.s.w 24575.000000 24575
+fcsr: 0x7
 cvt.s.w 10.000000 10
+fcsr: 0x7
 cvt.s.w -248562.000000 -248562
+fcsr: 0x7
 cvt.s.w -45786.000000 -45786
+fcsr: 0x7
 cvt.s.w 456.000000 456
+fcsr: 0x7
 cvt.s.w 34.000000 34
+fcsr: 0x7
 cvt.s.w 45786.000000 45786
+fcsr: 0x7
 cvt.s.w 1752065.000000 1752065
+fcsr: 0x7
 cvt.s.w 107.000000 107
+fcsr: 0x7
 cvt.s.w -45667.000000 -45667
+fcsr: 0x7
 cvt.s.w -7.000000 -7
+fcsr: 0x7
 cvt.s.w -347856.000000 -347856
+fcsr: 0x7
 cvt.s.w -2147483648.000000 -2147483648
+fcsr: 0x7
 cvt.s.w 268435440.000000 268435455
+fcsr: 0x1007
 cvt.s.w 23.000000 23
+fcsr: 0x7
 roundig mode: near
 cvt.w.s 0 0.000000
+fcsr: 0x4
 cvt.w.s 456 456.248962
+fcsr: 0x1004
 cvt.w.s 3 3.000000
+fcsr: 0x4
 cvt.w.s -1 -1.000000
+fcsr: 0x4
 cvt.w.s 1385 1384.599976
+fcsr: 0x1004
 cvt.w.s -7 -7.294568
+fcsr: 0x1004
 cvt.w.s 1000000000 1000000000.000000
+fcsr: 0x4
 cvt.w.s -5786 -5786.470215
+fcsr: 0x1004
 cvt.w.s 1752 1752.000000
+fcsr: 0x4
 cvt.w.s 0 0.002457
+fcsr: 0x1004
 cvt.w.s 0 0.123400
+fcsr: 0x1004
 cvt.w.s -248563 -248562.765625
+fcsr: 0x1004
 cvt.w.s -45786 -45786.476562
+fcsr: 0x1004
 cvt.w.s 456 456.248962
+fcsr: 0x1004
 cvt.w.s 34 34.000462
+fcsr: 0x1004
 cvt.w.s 45786 45786.476562
+fcsr: 0x1004
 cvt.w.s 1752065 1752065.000000
+fcsr: 0x4
 cvt.w.s 107 107.000000
+fcsr: 0x4
 cvt.w.s -45667 -45667.238281
+fcsr: 0x1004
 cvt.w.s -7 -7.294568
+fcsr: 0x1004
 cvt.w.s -347856 -347856.468750
+fcsr: 0x1004
 cvt.w.s 356048 356047.562500
+fcsr: 0x1004
 cvt.w.s -1 -1.000000
+fcsr: 0x4
 cvt.w.s 23 23.040001
+fcsr: 0x1004
 roundig mode: zero
 cvt.w.s 0 0.000000
+fcsr: 0x5
 cvt.w.s 456 456.248962
+fcsr: 0x1005
 cvt.w.s 3 3.000000
+fcsr: 0x5
 cvt.w.s -1 -1.000000
+fcsr: 0x5
 cvt.w.s 1384 1384.599976
+fcsr: 0x1005
 cvt.w.s -7 -7.294568
+fcsr: 0x1005
 cvt.w.s 1000000000 1000000000.000000
+fcsr: 0x5
 cvt.w.s -5786 -5786.470215
+fcsr: 0x1005
 cvt.w.s 1752 1752.000000
+fcsr: 0x5
 cvt.w.s 0 0.002457
+fcsr: 0x1005
 cvt.w.s 0 0.123400
+fcsr: 0x1005
 cvt.w.s -248562 -248562.765625
+fcsr: 0x1005
 cvt.w.s -45786 -45786.476562
+fcsr: 0x1005
 cvt.w.s 456 456.248962
+fcsr: 0x1005
 cvt.w.s 34 34.000462
+fcsr: 0x1005
 cvt.w.s 45786 45786.476562
+fcsr: 0x1005
 cvt.w.s 1752065 1752065.000000
+fcsr: 0x5
 cvt.w.s 107 107.000000
+fcsr: 0x5
 cvt.w.s -45667 -45667.238281
+fcsr: 0x1005
 cvt.w.s -7 -7.294568
+fcsr: 0x1005
 cvt.w.s -347856 -347856.468750
+fcsr: 0x1005
 cvt.w.s 356047 356047.562500
+fcsr: 0x1005
 cvt.w.s -1 -1.000000
+fcsr: 0x5
 cvt.w.s 23 23.040001
+fcsr: 0x1005
 roundig mode: +inf
 cvt.w.s 0 0.000000
+fcsr: 0x6
 cvt.w.s 457 456.248962
+fcsr: 0x1006
 cvt.w.s 3 3.000000
+fcsr: 0x6
 cvt.w.s -1 -1.000000
+fcsr: 0x6
 cvt.w.s 1385 1384.599976
+fcsr: 0x1006
 cvt.w.s -7 -7.294568
+fcsr: 0x1006
 cvt.w.s 1000000000 1000000000.000000
+fcsr: 0x6
 cvt.w.s -5786 -5786.470215
+fcsr: 0x1006
 cvt.w.s 1752 1752.000000
+fcsr: 0x6
 cvt.w.s 1 0.002457
+fcsr: 0x1006
 cvt.w.s 1 0.123400
+fcsr: 0x1006
 cvt.w.s -248562 -248562.765625
+fcsr: 0x1006
 cvt.w.s -45786 -45786.476562
+fcsr: 0x1006
 cvt.w.s 457 456.248962
+fcsr: 0x1006
 cvt.w.s 35 34.000462
+fcsr: 0x1006
 cvt.w.s 45787 45786.476562
+fcsr: 0x1006
 cvt.w.s 1752065 1752065.000000
+fcsr: 0x6
 cvt.w.s 107 107.000000
+fcsr: 0x6
 cvt.w.s -45667 -45667.238281
+fcsr: 0x1006
 cvt.w.s -7 -7.294568
+fcsr: 0x1006
 cvt.w.s -347856 -347856.468750
+fcsr: 0x1006
 cvt.w.s 356048 356047.562500
+fcsr: 0x1006
 cvt.w.s -1 -1.000000
+fcsr: 0x6
 cvt.w.s 24 23.040001
+fcsr: 0x1006
 roundig mode: -inf
 cvt.w.s 0 0.000000
+fcsr: 0x7
 cvt.w.s 456 456.248962
+fcsr: 0x1007
 cvt.w.s 3 3.000000
+fcsr: 0x7
 cvt.w.s -1 -1.000000
+fcsr: 0x7
 cvt.w.s 1384 1384.599976
+fcsr: 0x1007
 cvt.w.s -8 -7.294568
+fcsr: 0x1007
 cvt.w.s 1000000000 1000000000.000000
+fcsr: 0x7
 cvt.w.s -5787 -5786.470215
+fcsr: 0x1007
 cvt.w.s 1752 1752.000000
+fcsr: 0x7
 cvt.w.s 0 0.002457
+fcsr: 0x1007
 cvt.w.s 0 0.123400
+fcsr: 0x1007
 cvt.w.s -248563 -248562.765625
+fcsr: 0x1007
 cvt.w.s -45787 -45786.476562
+fcsr: 0x1007
 cvt.w.s 456 456.248962
+fcsr: 0x1007
 cvt.w.s 34 34.000462
+fcsr: 0x1007
 cvt.w.s 45786 45786.476562
+fcsr: 0x1007
 cvt.w.s 1752065 1752065.000000
+fcsr: 0x7
 cvt.w.s 107 107.000000
+fcsr: 0x7
 cvt.w.s -45668 -45667.238281
+fcsr: 0x1007
 cvt.w.s -8 -7.294568
+fcsr: 0x1007
 cvt.w.s -347857 -347856.468750
+fcsr: 0x1007
 cvt.w.s 356047 356047.562500
+fcsr: 0x1007
 cvt.w.s -1 -1.000000
+fcsr: 0x7
 cvt.w.s 23 23.040001
+fcsr: 0x1007
 roundig mode: near
 cvt.w.d 0 0.000000
+fcsr: 0x4
 cvt.w.d 456 456.248956
+fcsr: 0x1004
 cvt.w.d 3 3.000000
+fcsr: 0x4
 cvt.w.d -1 -1.000000
+fcsr: 0x4
 cvt.w.d 1385 1384.600000
+fcsr: 0x1004
 cvt.w.d -7 -7.294568
+fcsr: 0x1004
 cvt.w.d 1000000000 1000000000.000000
+fcsr: 0x4
 cvt.w.d -5786 -5786.470000
+fcsr: 0x1004
 cvt.w.d 1752 1752.000000
+fcsr: 0x4
 cvt.w.d 0 0.002458
+fcsr: 0x1004
 cvt.w.d 0 0.000000
+fcsr: 0x1004
 cvt.w.d -248563 -248562.760000
+fcsr: 0x1004
 cvt.w.d -45786 -45786.476000
+fcsr: 0x1004
 cvt.w.d 456 456.248956
+fcsr: 0x1004
 cvt.w.d 34 34.000460
+fcsr: 0x1004
 cvt.w.d 45786 45786.476000
+fcsr: 0x1004
 cvt.w.d 1752065 1752065.000000
+fcsr: 0x4
 cvt.w.d 107 107.000000
+fcsr: 0x4
 cvt.w.d -45667 -45667.240000
+fcsr: 0x1004
 cvt.w.d -7 -7.294568
+fcsr: 0x1004
 cvt.w.d -347856 -347856.475000
+fcsr: 0x1004
 cvt.w.d 356048 356047.560000
+fcsr: 0x1004
 cvt.w.d -1 -1.000000
+fcsr: 0x4
 cvt.w.d 23 23.040000
+fcsr: 0x1004
 roundig mode: zero
 cvt.w.d 0 0.000000
+fcsr: 0x5
 cvt.w.d 456 456.248956
+fcsr: 0x1005
 cvt.w.d 3 3.000000
+fcsr: 0x5
 cvt.w.d -1 -1.000000
+fcsr: 0x5
 cvt.w.d 1384 1384.600000
+fcsr: 0x1005
 cvt.w.d -7 -7.294568
+fcsr: 0x1005
 cvt.w.d 1000000000 1000000000.000000
+fcsr: 0x5
 cvt.w.d -5786 -5786.470000
+fcsr: 0x1005
 cvt.w.d 1752 1752.000000
+fcsr: 0x5
 cvt.w.d 0 0.002458
+fcsr: 0x1005
 cvt.w.d 0 0.000000
+fcsr: 0x1005
 cvt.w.d -248562 -248562.760000
+fcsr: 0x1005
 cvt.w.d -45786 -45786.476000
+fcsr: 0x1005
 cvt.w.d 456 456.248956
+fcsr: 0x1005
 cvt.w.d 34 34.000460
+fcsr: 0x1005
 cvt.w.d 45786 45786.476000
+fcsr: 0x1005
 cvt.w.d 1752065 1752065.000000
+fcsr: 0x5
 cvt.w.d 107 107.000000
+fcsr: 0x5
 cvt.w.d -45667 -45667.240000
+fcsr: 0x1005
 cvt.w.d -7 -7.294568
+fcsr: 0x1005
 cvt.w.d -347856 -347856.475000
+fcsr: 0x1005
 cvt.w.d 356047 356047.560000
+fcsr: 0x1005
 cvt.w.d -1 -1.000000
+fcsr: 0x5
 cvt.w.d 23 23.040000
+fcsr: 0x1005
 roundig mode: +inf
 cvt.w.d 0 0.000000
+fcsr: 0x6
 cvt.w.d 457 456.248956
+fcsr: 0x1006
 cvt.w.d 3 3.000000
+fcsr: 0x6
 cvt.w.d -1 -1.000000
+fcsr: 0x6
 cvt.w.d 1385 1384.600000
+fcsr: 0x1006
 cvt.w.d -7 -7.294568
+fcsr: 0x1006
 cvt.w.d 1000000000 1000000000.000000
+fcsr: 0x6
 cvt.w.d -5786 -5786.470000
+fcsr: 0x1006
 cvt.w.d 1752 1752.000000
+fcsr: 0x6
 cvt.w.d 1 0.002458
+fcsr: 0x1006
 cvt.w.d 1 0.000000
+fcsr: 0x1006
 cvt.w.d -248562 -248562.760000
+fcsr: 0x1006
 cvt.w.d -45786 -45786.476000
+fcsr: 0x1006
 cvt.w.d 457 456.248956
+fcsr: 0x1006
 cvt.w.d 35 34.000460
+fcsr: 0x1006
 cvt.w.d 45787 45786.476000
+fcsr: 0x1006
 cvt.w.d 1752065 1752065.000000
+fcsr: 0x6
 cvt.w.d 107 107.000000
+fcsr: 0x6
 cvt.w.d -45667 -45667.240000
+fcsr: 0x1006
 cvt.w.d -7 -7.294568
+fcsr: 0x1006
 cvt.w.d -347856 -347856.475000
+fcsr: 0x1006
 cvt.w.d 356048 356047.560000
+fcsr: 0x1006
 cvt.w.d -1 -1.000000
+fcsr: 0x6
 cvt.w.d 24 23.040000
+fcsr: 0x1006
 roundig mode: -inf
 cvt.w.d 0 0.000000
+fcsr: 0x7
 cvt.w.d 456 456.248956
+fcsr: 0x1007
 cvt.w.d 3 3.000000
+fcsr: 0x7
 cvt.w.d -1 -1.000000
+fcsr: 0x7
 cvt.w.d 1384 1384.600000
+fcsr: 0x1007
 cvt.w.d -8 -7.294568
+fcsr: 0x1007
 cvt.w.d 1000000000 1000000000.000000
+fcsr: 0x7
 cvt.w.d -5787 -5786.470000
+fcsr: 0x1007
 cvt.w.d 1752 1752.000000
+fcsr: 0x7
 cvt.w.d 0 0.002458
+fcsr: 0x1007
 cvt.w.d 0 0.000000
+fcsr: 0x1007
 cvt.w.d -248563 -248562.760000
+fcsr: 0x1007
 cvt.w.d -45787 -45786.476000
+fcsr: 0x1007
 cvt.w.d 456 456.248956
+fcsr: 0x1007
 cvt.w.d 34 34.000460
+fcsr: 0x1007
 cvt.w.d 45786 45786.476000
+fcsr: 0x1007
 cvt.w.d 1752065 1752065.000000
+fcsr: 0x7
 cvt.w.d 107 107.000000
+fcsr: 0x7
 cvt.w.d -45668 -45667.240000
+fcsr: 0x1007
 cvt.w.d -8 -7.294568
+fcsr: 0x1007
 cvt.w.d -347857 -347856.475000
+fcsr: 0x1007
 cvt.w.d 356047 356047.560000
+fcsr: 0x1007
 cvt.w.d -1 -1.000000
+fcsr: 0x7
 cvt.w.d 23 23.040000
+fcsr: 0x1007
 roundig mode: near
 cvt.d.l 18.000000 18
+fcsr: 0x4
 cvt.d.l 25.000000 25
+fcsr: 0x4
 cvt.d.l 3.000000 3
+fcsr: 0x4
 cvt.d.l -1.000000 -1
+fcsr: 0x4
 cvt.d.l 4294967295.000000 4294967295
+fcsr: 0x4
 cvt.d.l 356.000000 356
+fcsr: 0x4
 cvt.d.l 1000000.000000 1000000
+fcsr: 0x4
 cvt.d.l -5786.000000 -5786
+fcsr: 0x4
 cvt.d.l -1.000000 -1
+fcsr: 0x4
 cvt.d.l 24575.000000 24575
+fcsr: 0x4
 cvt.d.l 10.000000 10
+fcsr: 0x4
 cvt.d.l -125458.000000 -125458
+fcsr: 0x4
 cvt.d.l -486.000000 -486
+fcsr: 0x4
 cvt.d.l 456.000000 456
+fcsr: 0x4
 cvt.d.l 34.000000 34
+fcsr: 0x4
 cvt.d.l 45786.000000 45786
+fcsr: 0x4
 cvt.d.l 0.000000 0
+fcsr: 0x4
 cvt.d.l 1700000.000000 1700000
+fcsr: 0x4
 cvt.d.l -45667.000000 -45667
+fcsr: 0x4
 cvt.d.l -7.000000 -7
+fcsr: 0x4
 cvt.d.l -347856.000000 -347856
+fcsr: 0x4
 cvt.d.l 2147483648.000000 2147483648
+fcsr: 0x4
 cvt.d.l 268435455.000000 268435455
+fcsr: 0x4
 cvt.d.l 23.000000 23
+fcsr: 0x4
 roundig mode: zero
 cvt.d.l 18.000000 18
+fcsr: 0x5
 cvt.d.l 25.000000 25
+fcsr: 0x5
 cvt.d.l 3.000000 3
+fcsr: 0x5
 cvt.d.l -1.000000 -1
+fcsr: 0x5
 cvt.d.l 4294967295.000000 4294967295
+fcsr: 0x5
 cvt.d.l 356.000000 356
+fcsr: 0x5
 cvt.d.l 1000000.000000 1000000
+fcsr: 0x5
 cvt.d.l -5786.000000 -5786
+fcsr: 0x5
 cvt.d.l -1.000000 -1
+fcsr: 0x5
 cvt.d.l 24575.000000 24575
+fcsr: 0x5
 cvt.d.l 10.000000 10
+fcsr: 0x5
 cvt.d.l -125458.000000 -125458
+fcsr: 0x5
 cvt.d.l -486.000000 -486
+fcsr: 0x5
 cvt.d.l 456.000000 456
+fcsr: 0x5
 cvt.d.l 34.000000 34
+fcsr: 0x5
 cvt.d.l 45786.000000 45786
+fcsr: 0x5
 cvt.d.l 0.000000 0
+fcsr: 0x5
 cvt.d.l 1700000.000000 1700000
+fcsr: 0x5
 cvt.d.l -45667.000000 -45667
+fcsr: 0x5
 cvt.d.l -7.000000 -7
+fcsr: 0x5
 cvt.d.l -347856.000000 -347856
+fcsr: 0x5
 cvt.d.l 2147483648.000000 2147483648
+fcsr: 0x5
 cvt.d.l 268435455.000000 268435455
+fcsr: 0x5
 cvt.d.l 23.000000 23
+fcsr: 0x5
 roundig mode: +inf
 cvt.d.l 18.000000 18
+fcsr: 0x6
 cvt.d.l 25.000000 25
+fcsr: 0x6
 cvt.d.l 3.000000 3
+fcsr: 0x6
 cvt.d.l -1.000000 -1
+fcsr: 0x6
 cvt.d.l 4294967295.000000 4294967295
+fcsr: 0x6
 cvt.d.l 356.000000 356
+fcsr: 0x6
 cvt.d.l 1000000.000000 1000000
+fcsr: 0x6
 cvt.d.l -5786.000000 -5786
+fcsr: 0x6
 cvt.d.l -1.000000 -1
+fcsr: 0x6
 cvt.d.l 24575.000000 24575
+fcsr: 0x6
 cvt.d.l 10.000000 10
+fcsr: 0x6
 cvt.d.l -125458.000000 -125458
+fcsr: 0x6
 cvt.d.l -486.000000 -486
+fcsr: 0x6
 cvt.d.l 456.000000 456
+fcsr: 0x6
 cvt.d.l 34.000000 34
+fcsr: 0x6
 cvt.d.l 45786.000000 45786
+fcsr: 0x6
 cvt.d.l 0.000000 0
+fcsr: 0x6
 cvt.d.l 1700000.000000 1700000
+fcsr: 0x6
 cvt.d.l -45667.000000 -45667
+fcsr: 0x6
 cvt.d.l -7.000000 -7
+fcsr: 0x6
 cvt.d.l -347856.000000 -347856
+fcsr: 0x6
 cvt.d.l 2147483648.000000 2147483648
+fcsr: 0x6
 cvt.d.l 268435455.000000 268435455
+fcsr: 0x6
 cvt.d.l 23.000000 23
+fcsr: 0x6
 roundig mode: -inf
 cvt.d.l 18.000000 18
+fcsr: 0x7
 cvt.d.l 25.000000 25
+fcsr: 0x7
 cvt.d.l 3.000000 3
+fcsr: 0x7
 cvt.d.l -1.000000 -1
+fcsr: 0x7
 cvt.d.l 4294967295.000000 4294967295
+fcsr: 0x7
 cvt.d.l 356.000000 356
+fcsr: 0x7
 cvt.d.l 1000000.000000 1000000
+fcsr: 0x7
 cvt.d.l -5786.000000 -5786
+fcsr: 0x7
 cvt.d.l -1.000000 -1
+fcsr: 0x7
 cvt.d.l 24575.000000 24575
+fcsr: 0x7
 cvt.d.l 10.000000 10
+fcsr: 0x7
 cvt.d.l -125458.000000 -125458
+fcsr: 0x7
 cvt.d.l -486.000000 -486
+fcsr: 0x7
 cvt.d.l 456.000000 456
+fcsr: 0x7
 cvt.d.l 34.000000 34
+fcsr: 0x7
 cvt.d.l 45786.000000 45786
+fcsr: 0x7
 cvt.d.l 0.000000 0
+fcsr: 0x7
 cvt.d.l 1700000.000000 1700000
+fcsr: 0x7
 cvt.d.l -45667.000000 -45667
+fcsr: 0x7
 cvt.d.l -7.000000 -7
+fcsr: 0x7
 cvt.d.l -347856.000000 -347856
+fcsr: 0x7
 cvt.d.l 2147483648.000000 2147483648
+fcsr: 0x7
 cvt.d.l 268435455.000000 268435455
+fcsr: 0x7
 cvt.d.l 23.000000 23
+fcsr: 0x7
 roundig mode: near
 cvt.l.s 0 0.000000
+fcsr: 0x4
 cvt.l.s 456 456.248962
+fcsr: 0x1004
 cvt.l.s 3 3.000000
+fcsr: 0x4
 cvt.l.s -1 -1.000000
+fcsr: 0x4
 cvt.l.s 1385 1384.599976
+fcsr: 0x1004
 cvt.l.s -7 -7.294568
+fcsr: 0x1004
 cvt.l.s 1000000000 1000000000.000000
+fcsr: 0x4
 cvt.l.s -5786 -5786.470215
+fcsr: 0x1004
 cvt.l.s 1752 1752.000000
+fcsr: 0x4
 cvt.l.s 0 0.002457
+fcsr: 0x1004
 cvt.l.s 0 0.123400
+fcsr: 0x1004
 cvt.l.s -248563 -248562.765625
+fcsr: 0x1004
 cvt.l.s -45786 -45786.476562
+fcsr: 0x1004
 cvt.l.s 456 456.248962
+fcsr: 0x1004
 cvt.l.s 34 34.000462
+fcsr: 0x1004
 cvt.l.s 45786 45786.476562
+fcsr: 0x1004
 cvt.l.s 1752065 1752065.000000
+fcsr: 0x4
 cvt.l.s 107 107.000000
+fcsr: 0x4
 cvt.l.s -45667 -45667.238281
+fcsr: 0x1004
 cvt.l.s -7 -7.294568
+fcsr: 0x1004
 cvt.l.s -347856 -347856.468750
+fcsr: 0x1004
 cvt.l.s 356048 356047.562500
+fcsr: 0x1004
 cvt.l.s -1 -1.000000
+fcsr: 0x4
 cvt.l.s 23 23.040001
+fcsr: 0x1004
 roundig mode: zero
 cvt.l.s 0 0.000000
+fcsr: 0x5
 cvt.l.s 456 456.248962
+fcsr: 0x1005
 cvt.l.s 3 3.000000
+fcsr: 0x5
 cvt.l.s -1 -1.000000
+fcsr: 0x5
 cvt.l.s 1384 1384.599976
+fcsr: 0x1005
 cvt.l.s -7 -7.294568
+fcsr: 0x1005
 cvt.l.s 1000000000 1000000000.000000
+fcsr: 0x5
 cvt.l.s -5786 -5786.470215
+fcsr: 0x1005
 cvt.l.s 1752 1752.000000
+fcsr: 0x5
 cvt.l.s 0 0.002457
+fcsr: 0x1005
 cvt.l.s 0 0.123400
+fcsr: 0x1005
 cvt.l.s -248562 -248562.765625
+fcsr: 0x1005
 cvt.l.s -45786 -45786.476562
+fcsr: 0x1005
 cvt.l.s 456 456.248962
+fcsr: 0x1005
 cvt.l.s 34 34.000462
+fcsr: 0x1005
 cvt.l.s 45786 45786.476562
+fcsr: 0x1005
 cvt.l.s 1752065 1752065.000000
+fcsr: 0x5
 cvt.l.s 107 107.000000
+fcsr: 0x5
 cvt.l.s -45667 -45667.238281
+fcsr: 0x1005
 cvt.l.s -7 -7.294568
+fcsr: 0x1005
 cvt.l.s -347856 -347856.468750
+fcsr: 0x1005
 cvt.l.s 356047 356047.562500
+fcsr: 0x1005
 cvt.l.s -1 -1.000000
+fcsr: 0x5
 cvt.l.s 23 23.040001
+fcsr: 0x1005
 roundig mode: +inf
 cvt.l.s 0 0.000000
+fcsr: 0x6
 cvt.l.s 457 456.248962
+fcsr: 0x1006
 cvt.l.s 3 3.000000
+fcsr: 0x6
 cvt.l.s -1 -1.000000
+fcsr: 0x6
 cvt.l.s 1385 1384.599976
+fcsr: 0x1006
 cvt.l.s -7 -7.294568
+fcsr: 0x1006
 cvt.l.s 1000000000 1000000000.000000
+fcsr: 0x6
 cvt.l.s -5786 -5786.470215
+fcsr: 0x1006
 cvt.l.s 1752 1752.000000
+fcsr: 0x6
 cvt.l.s 1 0.002457
+fcsr: 0x1006
 cvt.l.s 1 0.123400
+fcsr: 0x1006
 cvt.l.s -248562 -248562.765625
+fcsr: 0x1006
 cvt.l.s -45786 -45786.476562
+fcsr: 0x1006
 cvt.l.s 457 456.248962
+fcsr: 0x1006
 cvt.l.s 35 34.000462
+fcsr: 0x1006
 cvt.l.s 45787 45786.476562
+fcsr: 0x1006
 cvt.l.s 1752065 1752065.000000
+fcsr: 0x6
 cvt.l.s 107 107.000000
+fcsr: 0x6
 cvt.l.s -45667 -45667.238281
+fcsr: 0x1006
 cvt.l.s -7 -7.294568
+fcsr: 0x1006
 cvt.l.s -347856 -347856.468750
+fcsr: 0x1006
 cvt.l.s 356048 356047.562500
+fcsr: 0x1006
 cvt.l.s -1 -1.000000
+fcsr: 0x6
 cvt.l.s 24 23.040001
+fcsr: 0x1006
 roundig mode: -inf
 cvt.l.s 0 0.000000
+fcsr: 0x7
 cvt.l.s 456 456.248962
+fcsr: 0x1007
 cvt.l.s 3 3.000000
+fcsr: 0x7
 cvt.l.s -1 -1.000000
+fcsr: 0x7
 cvt.l.s 1384 1384.599976
+fcsr: 0x1007
 cvt.l.s -8 -7.294568
+fcsr: 0x1007
 cvt.l.s 1000000000 1000000000.000000
+fcsr: 0x7
 cvt.l.s -5787 -5786.470215
+fcsr: 0x1007
 cvt.l.s 1752 1752.000000
+fcsr: 0x7
 cvt.l.s 0 0.002457
+fcsr: 0x1007
 cvt.l.s 0 0.123400
+fcsr: 0x1007
 cvt.l.s -248563 -248562.765625
+fcsr: 0x1007
 cvt.l.s -45787 -45786.476562
+fcsr: 0x1007
 cvt.l.s 456 456.248962
+fcsr: 0x1007
 cvt.l.s 34 34.000462
+fcsr: 0x1007
 cvt.l.s 45786 45786.476562
+fcsr: 0x1007
 cvt.l.s 1752065 1752065.000000
+fcsr: 0x7
 cvt.l.s 107 107.000000
+fcsr: 0x7
 cvt.l.s -45668 -45667.238281
+fcsr: 0x1007
 cvt.l.s -8 -7.294568
+fcsr: 0x1007
 cvt.l.s -347857 -347856.468750
+fcsr: 0x1007
 cvt.l.s 356047 356047.562500
+fcsr: 0x1007
 cvt.l.s -1 -1.000000
+fcsr: 0x7
 cvt.l.s 23 23.040001
+fcsr: 0x1007
 roundig mode: near
 cvt.l.d 0 0.000000
+fcsr: 0x4
 cvt.l.d 456 456.248956
+fcsr: 0x1004
 cvt.l.d 3 3.000000
+fcsr: 0x4
 cvt.l.d -1 -1.000000
+fcsr: 0x4
 cvt.l.d 1385 1384.600000
+fcsr: 0x1004
 cvt.l.d -7 -7.294568
+fcsr: 0x1004
 cvt.l.d 1000000000 1000000000.000000
+fcsr: 0x4
 cvt.l.d -5786 -5786.470000
+fcsr: 0x1004
 cvt.l.d 1752 1752.000000
+fcsr: 0x4
 cvt.l.d 0 0.002458
+fcsr: 0x1004
 cvt.l.d 0 0.000000
+fcsr: 0x1004
 cvt.l.d -248563 -248562.760000
+fcsr: 0x1004
 cvt.l.d -45786 -45786.476000
+fcsr: 0x1004
 cvt.l.d 456 456.248956
+fcsr: 0x1004
 cvt.l.d 34 34.000460
+fcsr: 0x1004
 cvt.l.d 45786 45786.476000
+fcsr: 0x1004
 cvt.l.d 1752065 1752065.000000
+fcsr: 0x4
 cvt.l.d 107 107.000000
+fcsr: 0x4
 cvt.l.d -45667 -45667.240000
+fcsr: 0x1004
 cvt.l.d -7 -7.294568
+fcsr: 0x1004
 cvt.l.d -347856 -347856.475000
+fcsr: 0x1004
 cvt.l.d 356048 356047.560000
+fcsr: 0x1004
 cvt.l.d -1 -1.000000
+fcsr: 0x4
 cvt.l.d 23 23.040000
+fcsr: 0x1004
 roundig mode: zero
 cvt.l.d 0 0.000000
+fcsr: 0x5
 cvt.l.d 456 456.248956
+fcsr: 0x1005
 cvt.l.d 3 3.000000
+fcsr: 0x5
 cvt.l.d -1 -1.000000
+fcsr: 0x5
 cvt.l.d 1384 1384.600000
+fcsr: 0x1005
 cvt.l.d -7 -7.294568
+fcsr: 0x1005
 cvt.l.d 1000000000 1000000000.000000
+fcsr: 0x5
 cvt.l.d -5786 -5786.470000
+fcsr: 0x1005
 cvt.l.d 1752 1752.000000
+fcsr: 0x5
 cvt.l.d 0 0.002458
+fcsr: 0x1005
 cvt.l.d 0 0.000000
+fcsr: 0x1005
 cvt.l.d -248562 -248562.760000
+fcsr: 0x1005
 cvt.l.d -45786 -45786.476000
+fcsr: 0x1005
 cvt.l.d 456 456.248956
+fcsr: 0x1005
 cvt.l.d 34 34.000460
+fcsr: 0x1005
 cvt.l.d 45786 45786.476000
+fcsr: 0x1005
 cvt.l.d 1752065 1752065.000000
+fcsr: 0x5
 cvt.l.d 107 107.000000
+fcsr: 0x5
 cvt.l.d -45667 -45667.240000
+fcsr: 0x1005
 cvt.l.d -7 -7.294568
+fcsr: 0x1005
 cvt.l.d -347856 -347856.475000
+fcsr: 0x1005
 cvt.l.d 356047 356047.560000
+fcsr: 0x1005
 cvt.l.d -1 -1.000000
+fcsr: 0x5
 cvt.l.d 23 23.040000
+fcsr: 0x1005
 roundig mode: +inf
 cvt.l.d 0 0.000000
+fcsr: 0x6
 cvt.l.d 457 456.248956
+fcsr: 0x1006
 cvt.l.d 3 3.000000
+fcsr: 0x6
 cvt.l.d -1 -1.000000
+fcsr: 0x6
 cvt.l.d 1385 1384.600000
+fcsr: 0x1006
 cvt.l.d -7 -7.294568
+fcsr: 0x1006
 cvt.l.d 1000000000 1000000000.000000
+fcsr: 0x6
 cvt.l.d -5786 -5786.470000
+fcsr: 0x1006
 cvt.l.d 1752 1752.000000
+fcsr: 0x6
 cvt.l.d 1 0.002458
+fcsr: 0x1006
 cvt.l.d 1 0.000000
+fcsr: 0x1006
 cvt.l.d -248562 -248562.760000
+fcsr: 0x1006
 cvt.l.d -45786 -45786.476000
+fcsr: 0x1006
 cvt.l.d 457 456.248956
+fcsr: 0x1006
 cvt.l.d 35 34.000460
+fcsr: 0x1006
 cvt.l.d 45787 45786.476000
+fcsr: 0x1006
 cvt.l.d 1752065 1752065.000000
+fcsr: 0x6
 cvt.l.d 107 107.000000
+fcsr: 0x6
 cvt.l.d -45667 -45667.240000
+fcsr: 0x1006
 cvt.l.d -7 -7.294568
+fcsr: 0x1006
 cvt.l.d -347856 -347856.475000
+fcsr: 0x1006
 cvt.l.d 356048 356047.560000
+fcsr: 0x1006
 cvt.l.d -1 -1.000000
+fcsr: 0x6
 cvt.l.d 24 23.040000
+fcsr: 0x1006
 roundig mode: -inf
 cvt.l.d 0 0.000000
+fcsr: 0x7
 cvt.l.d 456 456.248956
+fcsr: 0x1007
 cvt.l.d 3 3.000000
+fcsr: 0x7
 cvt.l.d -1 -1.000000
+fcsr: 0x7
 cvt.l.d 1384 1384.600000
+fcsr: 0x1007
 cvt.l.d -8 -7.294568
+fcsr: 0x1007
 cvt.l.d 1000000000 1000000000.000000
+fcsr: 0x7
 cvt.l.d -5787 -5786.470000
+fcsr: 0x1007
 cvt.l.d 1752 1752.000000
+fcsr: 0x7
 cvt.l.d 0 0.002458
+fcsr: 0x1007
 cvt.l.d 0 0.000000
+fcsr: 0x1007
 cvt.l.d -248563 -248562.760000
+fcsr: 0x1007
 cvt.l.d -45787 -45786.476000
+fcsr: 0x1007
 cvt.l.d 456 456.248956
+fcsr: 0x1007
 cvt.l.d 34 34.000460
+fcsr: 0x1007
 cvt.l.d 45786 45786.476000
+fcsr: 0x1007
 cvt.l.d 1752065 1752065.000000
+fcsr: 0x7
 cvt.l.d 107 107.000000
+fcsr: 0x7
 cvt.l.d -45668 -45667.240000
+fcsr: 0x1007
 cvt.l.d -8 -7.294568
+fcsr: 0x1007
 cvt.l.d -347857 -347856.475000
+fcsr: 0x1007
 cvt.l.d 356047 356047.560000
+fcsr: 0x1007
 cvt.l.d -1 -1.000000
+fcsr: 0x7
 cvt.l.d 23 23.040000
+fcsr: 0x1007
 roundig mode: near
 cvt.s.l 18.000000 18
+fcsr: 0x4
 cvt.s.l 25.000000 25
+fcsr: 0x4
 cvt.s.l 3.000000 3
+fcsr: 0x4
 cvt.s.l -1.000000 -1
+fcsr: 0x4
 cvt.s.l 4294967296.000000 4294967295
+fcsr: 0x1004
 cvt.s.l 356.000000 356
+fcsr: 0x4
 cvt.s.l 1000000.000000 1000000
+fcsr: 0x4
 cvt.s.l -5786.000000 -5786
+fcsr: 0x4
 cvt.s.l -1.000000 -1
+fcsr: 0x4
 cvt.s.l 24575.000000 24575
+fcsr: 0x4
 cvt.s.l 10.000000 10
+fcsr: 0x4
 cvt.s.l -125458.000000 -125458
+fcsr: 0x4
 cvt.s.l -486.000000 -486
+fcsr: 0x4
 cvt.s.l 456.000000 456
+fcsr: 0x4
 cvt.s.l 34.000000 34
+fcsr: 0x4
 cvt.s.l 45786.000000 45786
+fcsr: 0x4
 cvt.s.l 0.000000 0
+fcsr: 0x4
 cvt.s.l 1700000.000000 1700000
+fcsr: 0x4
 cvt.s.l -45667.000000 -45667
+fcsr: 0x4
 cvt.s.l -7.000000 -7
+fcsr: 0x4
 cvt.s.l -347856.000000 -347856
+fcsr: 0x4
 cvt.s.l 2147483648.000000 2147483648
+fcsr: 0x4
 cvt.s.l 268435456.000000 268435455
+fcsr: 0x1004
 cvt.s.l 23.000000 23
+fcsr: 0x4
 roundig mode: zero
 cvt.s.l 18.000000 18
+fcsr: 0x5
 cvt.s.l 25.000000 25
+fcsr: 0x5
 cvt.s.l 3.000000 3
+fcsr: 0x5
 cvt.s.l -1.000000 -1
+fcsr: 0x5
 cvt.s.l 4294967040.000000 4294967295
+fcsr: 0x1005
 cvt.s.l 356.000000 356
+fcsr: 0x5
 cvt.s.l 1000000.000000 1000000
+fcsr: 0x5
 cvt.s.l -5786.000000 -5786
+fcsr: 0x5
 cvt.s.l -1.000000 -1
+fcsr: 0x5
 cvt.s.l 24575.000000 24575
+fcsr: 0x5
 cvt.s.l 10.000000 10
+fcsr: 0x5
 cvt.s.l -125458.000000 -125458
+fcsr: 0x5
 cvt.s.l -486.000000 -486
+fcsr: 0x5
 cvt.s.l 456.000000 456
+fcsr: 0x5
 cvt.s.l 34.000000 34
+fcsr: 0x5
 cvt.s.l 45786.000000 45786
+fcsr: 0x5
 cvt.s.l 0.000000 0
+fcsr: 0x5
 cvt.s.l 1700000.000000 1700000
+fcsr: 0x5
 cvt.s.l -45667.000000 -45667
+fcsr: 0x5
 cvt.s.l -7.000000 -7
+fcsr: 0x5
 cvt.s.l -347856.000000 -347856
+fcsr: 0x5
 cvt.s.l 2147483648.000000 2147483648
+fcsr: 0x5
 cvt.s.l 268435440.000000 268435455
+fcsr: 0x1005
 cvt.s.l 23.000000 23
+fcsr: 0x5
 roundig mode: +inf
 cvt.s.l 18.000000 18
+fcsr: 0x6
 cvt.s.l 25.000000 25
+fcsr: 0x6
 cvt.s.l 3.000000 3
+fcsr: 0x6
 cvt.s.l -1.000000 -1
+fcsr: 0x6
 cvt.s.l 4294967296.000000 4294967295
+fcsr: 0x1006
 cvt.s.l 356.000000 356
+fcsr: 0x6
 cvt.s.l 1000000.000000 1000000
+fcsr: 0x6
 cvt.s.l -5786.000000 -5786
+fcsr: 0x6
 cvt.s.l -1.000000 -1
+fcsr: 0x6
 cvt.s.l 24575.000000 24575
+fcsr: 0x6
 cvt.s.l 10.000000 10
+fcsr: 0x6
 cvt.s.l -125458.000000 -125458
+fcsr: 0x6
 cvt.s.l -486.000000 -486
+fcsr: 0x6
 cvt.s.l 456.000000 456
+fcsr: 0x6
 cvt.s.l 34.000000 34
+fcsr: 0x6
 cvt.s.l 45786.000000 45786
+fcsr: 0x6
 cvt.s.l 0.000000 0
+fcsr: 0x6
 cvt.s.l 1700000.000000 1700000
+fcsr: 0x6
 cvt.s.l -45667.000000 -45667
+fcsr: 0x6
 cvt.s.l -7.000000 -7
+fcsr: 0x6
 cvt.s.l -347856.000000 -347856
+fcsr: 0x6
 cvt.s.l 2147483648.000000 2147483648
+fcsr: 0x6
 cvt.s.l 268435456.000000 268435455
+fcsr: 0x1006
 cvt.s.l 23.000000 23
+fcsr: 0x6
 roundig mode: -inf
 cvt.s.l 18.000000 18
+fcsr: 0x7
 cvt.s.l 25.000000 25
+fcsr: 0x7
 cvt.s.l 3.000000 3
+fcsr: 0x7
 cvt.s.l -1.000000 -1
+fcsr: 0x7
 cvt.s.l 4294967040.000000 4294967295
+fcsr: 0x1007
 cvt.s.l 356.000000 356
+fcsr: 0x7
 cvt.s.l 1000000.000000 1000000
+fcsr: 0x7
 cvt.s.l -5786.000000 -5786
+fcsr: 0x7
 cvt.s.l -1.000000 -1
+fcsr: 0x7
 cvt.s.l 24575.000000 24575
+fcsr: 0x7
 cvt.s.l 10.000000 10
+fcsr: 0x7
 cvt.s.l -125458.000000 -125458
+fcsr: 0x7
 cvt.s.l -486.000000 -486
+fcsr: 0x7
 cvt.s.l 456.000000 456
+fcsr: 0x7
 cvt.s.l 34.000000 34
+fcsr: 0x7
 cvt.s.l 45786.000000 45786
+fcsr: 0x7
 cvt.s.l 0.000000 0
+fcsr: 0x7
 cvt.s.l 1700000.000000 1700000
+fcsr: 0x7
 cvt.s.l -45667.000000 -45667
+fcsr: 0x7
 cvt.s.l -7.000000 -7
+fcsr: 0x7
 cvt.s.l -347856.000000 -347856
+fcsr: 0x7
 cvt.s.l 2147483648.000000 2147483648
+fcsr: 0x7
 cvt.s.l 268435440.000000 268435455
+fcsr: 0x1007
 cvt.s.l 23.000000 23
+fcsr: 0x7

diff --git a/none/tests/mips64/test_fcsr.c b/none/tests/mips64/test_fcsr.c
new file mode 100644 (file)
index 0000000..ef92f7b
--- /dev/null
+++ b/none/tests/mips64/test_fcsr.c
@@ -0,0 +1,26 @@
+#include <stdio.h>
+
+int main ()
+{
+   long out [] = {0, 0};
+   __asm__ volatile("cfc1       $a1,   $31"                 "\n\t"
+                    "dli        $t0,   0x405ee0a3d70a3d71"  "\n\t"
+                    "dmtc1      $t0,   $f0"                 "\n\t"
+                    "ctc1       $zero, $31"                 "\n\t"
+                    "round.w.d  $f0,   $f0"                 "\n\t"
+                    "cfc1       $a2,   $31"                 "\n\t"
+                    "sd         $a2,   0(%0)"               "\n\t"
+                    "dli        $t0,   0x3ff0000000000000"  "\n\t"
+                    "dmtc1      $t0,   $f0"                 "\n\t"
+                    "ctc1       $zero, $31"                 "\n\t"
+                    "round.w.d  $f0,   $f0"                 "\n\t"
+                    "cfc1       $a2,   $31"                 "\n\t"
+                    "sd         $a2,   8(%0)"               "\n\t"
+                    "ctc1       $a1,   $31"                 "\n\t"
+                    :
+                    : "r" (out)
+                    : "a1", "a2", "t0", "$f0"
+                   );
+   printf("FCSR::1: 0x%lx, 2: 0x%lx\n", out[0], out[1]);
+   return 0;
+}

diff --git a/none/tests/mips64/test_fcsr.stderr.exp b/none/tests/mips64/test_fcsr.stderr.exp
new file mode 100644 (file)
index 0000000..e69de29

diff --git a/none/tests/mips64/test_fcsr.stdout.exp b/none/tests/mips64/test_fcsr.stdout.exp
new file mode 100644 (file)
index 0000000..a1f085b
--- /dev/null
+++ b/none/tests/mips64/test_fcsr.stdout.exp
@@ -0,0 +1 @@
+FCSR::1: 0x1004, 2: 0x0

diff --git a/none/tests/mips64/test_fcsr.vgtest b/none/tests/mips64/test_fcsr.vgtest
new file mode 100644 (file)
index 0000000..c864d25
--- /dev/null
+++ b/none/tests/mips64/test_fcsr.vgtest
@@ -0,0 +1,2 @@
+prog: test_fcsr
+vgopts: -q