perf/x86/intel: Do not enable BTS for guests

By default when users program perf to sample branch instructions
(PERF_COUNT_HW_BRANCH_INSTRUCTIONS) with a sample period of 1, perf
interprets this as a special case and enables BTS (Branch Trace Store)
as an optimization to avoid taking an interrupt on every branch.

Since BTS doesn't virtualize, this optimization doesn't make sense when
the request originates from a guest. Add an additional check that
prevents this optimization for virtualized events (exclude_host).

Reported-by: Jan H. Schönherr <jschoenh@amazon.de>
Suggested-by: Peter Zijlstra <peterz@infradead.org>
Signed-off-by: Fernand Sieber <sieberf@amazon.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: <stable@vger.kernel.org>
Link: https://patch.msgid.link/20251211183604.868641-1-sieberf@amazon.com

diff --git a/arch/x86/events/perf_event.h b/arch/x86/events/perf_event.h
index 62963022b517ff8fc13854c0a8a6a0d1a21c538f..ad35c546243ed32b20750dd4090991b0829345fe 100644 (file)
--- a/arch/x86/events/perf_event.h
+++ b/arch/x86/events/perf_event.h
@@ -1574,13 +1574,22 @@ static inline bool intel_pmu_has_bts_period(struct perf_event *event, u64 period
        struct hw_perf_event *hwc = &event->hw;
        unsigned int hw_event, bts_event;
 
-       if (event->attr.freq)
+       /*
+        * Only use BTS for fixed rate period==1 events.
+        */
+       if (event->attr.freq || period != 1)
+               return false;
+
+       /*
+        * BTS doesn't virtualize.
+        */
+       if (event->attr.exclude_host)
                return false;
 
        hw_event = hwc->config & INTEL_ARCH_EVENT_MASK;
        bts_event = x86_pmu.event_map(PERF_COUNT_HW_BRANCH_INSTRUCTIONS);
 
-       return hw_event == bts_event && period == 1;
+       return hw_event == bts_event;
 }
 
 static inline bool intel_pmu_has_bts(struct perf_event *event)