CONFIG_HAS_IOMEM=y
CONFIG_HOLES_IN_ZONE=y
CONFIG_HZ_PERIODIC=y
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_BRCMSTB=y
CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000
CONFIG_IRQCHIP=y
CONFIG_IRQ_DOMAIN=y
CONFIG_HAS_IOMEM=y
CONFIG_HOLES_IN_ZONE=y
CONFIG_HZ_PERIODIC=y
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_BRCMSTB=y
CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000
CONFIG_IRQCHIP=y
CONFIG_IRQ_DOMAIN=y
+From 47513f6dd93b5b7d91143219c2c1fb883664ed13 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
-Date: Tue, 9 Nov 2021 11:39:42 +0100
-Subject: [PATCH] arm64: dts: broadcom: bcm4908: add TWD block
+Date: Wed, 9 Feb 2022 21:14:17 +0100
+Subject: [PATCH] arm64: dts: broadcom: bcm4908: add watchdog block
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
-BCM4908 contains TWD block that provides few functions:
-1. Timers
-2. Wathchdog
-3. Software reset
+BCM4908 has the same watchdog as BCM63xx devices. Use "brcm,bcm6345-wdt"
+binding which matches the first SoC with that block.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
- .../boot/dts/broadcom/bcm4908/bcm4908.dtsi | 17 +++++++++++++----
- 1 file changed, 13 insertions(+), 4 deletions(-)
+ arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi | 9 +++++++++
+ 1 file changed, 9 insertions(+)
--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
+ #size-cells = <1>;
+
+ watchdog@28 {
-+ compatible = "brcm,bcm7038-wdt";
++ compatible = "brcm,bcm6345-wdt";
+ reg = <0x28 0x8>;
+ };
};
--- /dev/null
+From ba5dfa2fd8d0aed4e4b6f650ba9e8ea7cdd6ead1 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
+Date: Tue, 15 Feb 2022 07:36:39 +0100
+Subject: [PATCH] arm64: dts: broadcom: bcm4908: add I2C block
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+BCM4908 uses the same I2C hw as BCM63xx / BCM67xx / BCM68xx SoCs.
+
+Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+---
+ arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi | 9 +++++++++
+ 1 file changed, 9 insertions(+)
+
+--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
++++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
+@@ -456,6 +456,15 @@
+ };
+ };
+
++ i2c@2100 {
++ compatible = "brcm,brcmper-i2c";
++ reg = <0x2100 0x58>;
++ clock-frequency = <97500>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&pins_i2c_a>;
++ status = "disabled";
++ };
++
+ misc@2600 {
+ compatible = "brcm,misc", "simple-mfd";
+ reg = <0x2600 0xe4>;
--- /dev/null
+From d0aee048d648ec2d9aa7af43b127ebf847d497d5 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
+Date: Fri, 11 Feb 2022 11:58:06 +0100
+Subject: [PATCH] i2c: brcmstb: allow compiling on BCM4908
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+BCM4908 SoCs use the same I2C hardware block as STB and BCM63xx devices.
+
+Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
+Acked-by: Florian Fainelli <f.fainelli@gmail.com>
+Signed-off-by: Wolfram Sang <wsa@kernel.org>
+---
+ drivers/i2c/busses/Kconfig | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/drivers/i2c/busses/Kconfig
++++ b/drivers/i2c/busses/Kconfig
+@@ -477,8 +477,8 @@ config I2C_BCM_KONA
+
+ config I2C_BRCMSTB
+ tristate "BRCM Settop/DSL I2C controller"
+- depends on ARCH_BCM2835 || ARCH_BRCMSTB || BMIPS_GENERIC || \
+- ARCH_BCM_63XX || COMPILE_TEST
++ depends on ARCH_BCM2835 || ARCH_BCM4908 || ARCH_BCM_63XX || \
++ ARCH_BRCMSTB || BMIPS_GENERIC || COMPILE_TEST
+ default y
+ help
+ If you say yes to this option, support will be included for the
--- /dev/null
+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
+Date: Tue, 15 Feb 2022 08:27:35 +0100
+Subject: [PATCH] i2c: brcmstb: fix support for DSL and CM variants
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+DSL and CM (Cable Modem) support 8 B max transfer size and have a custom
+DT binding for that reason. This driver was checking for a wrong
+"compatible" however which resulted in an incorrect setup.
+
+Fixes: e2e5a2c61837 ("i2c: brcmstb: Adding support for CM and DSL SoCs")
+Cc: Kamal Dasu <kdasu.kdev@gmail.com>
+Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
+Acked-by: Florian Fainelli <f.fainelli@gmail.com>
+---
+ drivers/i2c/busses/i2c-brcmstb.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/i2c/busses/i2c-brcmstb.c
++++ b/drivers/i2c/busses/i2c-brcmstb.c
+@@ -674,7 +674,7 @@ static int brcmstb_i2c_probe(struct plat
+
+ /* set the data in/out register size for compatible SoCs */
+ if (of_device_is_compatible(dev->device->of_node,
+- "brcmstb,brcmper-i2c"))
++ "brcm,brcmper-i2c"))
+ dev->data_regsz = sizeof(u8);
+ else
+ dev->data_regsz = sizeof(u32);
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
-Date: Tue, 9 Nov 2021 11:34:28 +0100
-Subject: [PATCH] watchdog: bcm7038_wdt: allow building on ARCH_BCM4908
+Date: Wed, 9 Feb 2022 21:32:02 +0100
+Subject: [PATCH] watchdog: allow building BCM7038_WDT for BCM4908
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
-The same hardware block is present on BCM4908 SoCs family.
+BCM4908 is a SoCs family that shares a lot of hardware with BCM63xx
+including the watchdog block. Allow building this driver for it.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
+Acked-by: Florian Fainelli <f.fainelli@gmail.com>
+Reviewed-by: Guenter Roeck <linux@roeck-us.net>
---
drivers/watchdog/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- /dev/null
+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
+Date: Wed, 16 Feb 2022 07:28:34 +0100
+Subject: [PATCH] watchdog: bcm7038_wdt: Support BCM6345 compatible string
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+A new "compatible" value has been added in the commit 17fffe91ba36
+("dt-bindings: watchdog: Add BCM6345 compatible to BCM7038 binding").
+It's meant to be used for BCM63xx SoCs family but hardware block can be
+programmed just like the 7038 one.
+
+Cc: Florian Fainelli <f.fainelli@gmail.com>
+Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
+---
+ drivers/watchdog/bcm7038_wdt.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/drivers/watchdog/bcm7038_wdt.c
++++ b/drivers/watchdog/bcm7038_wdt.c
+@@ -193,6 +193,7 @@ static SIMPLE_DEV_PM_OPS(bcm7038_wdt_pm_
+ bcm7038_wdt_resume);
+
+ static const struct of_device_id bcm7038_wdt_match[] = {
++ { .compatible = "brcm,bcm6345-wdt" },
+ { .compatible = "brcm,bcm7038-wdt" },
+ {},
+ };
--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
-@@ -281,7 +281,7 @@
+@@ -290,7 +290,7 @@
gpio0: gpio-controller@500 {
compatible = "brcm,bcm6345-gpio";
reg-names = "dirout", "dat";
+From 47513f6dd93b5b7d91143219c2c1fb883664ed13 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
-Date: Tue, 9 Nov 2021 11:39:42 +0100
-Subject: [PATCH] arm64: dts: broadcom: bcm4908: add TWD block
+Date: Wed, 9 Feb 2022 21:14:17 +0100
+Subject: [PATCH] arm64: dts: broadcom: bcm4908: add watchdog block
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
-BCM4908 contains TWD block that provides few functions:
-1. Timers
-2. Wathchdog
-3. Software reset
+BCM4908 has the same watchdog as BCM63xx devices. Use "brcm,bcm6345-wdt"
+binding which matches the first SoC with that block.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
- .../boot/dts/broadcom/bcm4908/bcm4908.dtsi | 17 +++++++++++++----
- 1 file changed, 13 insertions(+), 4 deletions(-)
+ arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi | 9 +++++++++
+ 1 file changed, 9 insertions(+)
--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
+ #size-cells = <1>;
+
+ watchdog@28 {
-+ compatible = "brcm,bcm7038-wdt";
++ compatible = "brcm,bcm6345-wdt";
+ reg = <0x28 0x8>;
+ };
};
--- /dev/null
+From ba5dfa2fd8d0aed4e4b6f650ba9e8ea7cdd6ead1 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
+Date: Tue, 15 Feb 2022 07:36:39 +0100
+Subject: [PATCH] arm64: dts: broadcom: bcm4908: add I2C block
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+BCM4908 uses the same I2C hw as BCM63xx / BCM67xx / BCM68xx SoCs.
+
+Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+---
+ arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi | 9 +++++++++
+ 1 file changed, 9 insertions(+)
+
+--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
++++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
+@@ -456,6 +456,15 @@
+ };
+ };
+
++ i2c@2100 {
++ compatible = "brcm,brcmper-i2c";
++ reg = <0x2100 0x58>;
++ clock-frequency = <97500>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&pins_i2c_a>;
++ status = "disabled";
++ };
++
+ misc@2600 {
+ compatible = "brcm,misc", "simple-mfd";
+ reg = <0x2600 0xe4>;
--- /dev/null
+From d0aee048d648ec2d9aa7af43b127ebf847d497d5 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
+Date: Fri, 11 Feb 2022 11:58:06 +0100
+Subject: [PATCH] i2c: brcmstb: allow compiling on BCM4908
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+BCM4908 SoCs use the same I2C hardware block as STB and BCM63xx devices.
+
+Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
+Acked-by: Florian Fainelli <f.fainelli@gmail.com>
+Signed-off-by: Wolfram Sang <wsa@kernel.org>
+---
+ drivers/i2c/busses/Kconfig | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/drivers/i2c/busses/Kconfig
++++ b/drivers/i2c/busses/Kconfig
+@@ -472,8 +472,8 @@ config I2C_BCM_KONA
+
+ config I2C_BRCMSTB
+ tristate "BRCM Settop/DSL I2C controller"
+- depends on ARCH_BRCMSTB || BMIPS_GENERIC || ARCH_BCM_63XX || \
+- COMPILE_TEST
++ depends on ARCH_BCM4908 || ARCH_BCM_63XX || ARCH_BRCMSTB || \
++ BMIPS_GENERIC || COMPILE_TEST
+ default y
+ help
+ If you say yes to this option, support will be included for the
--- /dev/null
+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
+Date: Tue, 15 Feb 2022 08:27:35 +0100
+Subject: [PATCH] i2c: brcmstb: fix support for DSL and CM variants
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+DSL and CM (Cable Modem) support 8 B max transfer size and have a custom
+DT binding for that reason. This driver was checking for a wrong
+"compatible" however which resulted in an incorrect setup.
+
+Fixes: e2e5a2c61837 ("i2c: brcmstb: Adding support for CM and DSL SoCs")
+Cc: Kamal Dasu <kdasu.kdev@gmail.com>
+Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
+Acked-by: Florian Fainelli <f.fainelli@gmail.com>
+---
+ drivers/i2c/busses/i2c-brcmstb.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/i2c/busses/i2c-brcmstb.c
++++ b/drivers/i2c/busses/i2c-brcmstb.c
+@@ -640,7 +640,7 @@ static int brcmstb_i2c_probe(struct plat
+
+ /* set the data in/out register size for compatible SoCs */
+ if (of_device_is_compatible(dev->device->of_node,
+- "brcmstb,brcmper-i2c"))
++ "brcm,brcmper-i2c"))
+ dev->data_regsz = sizeof(u8);
+ else
+ dev->data_regsz = sizeof(u32);
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
-Date: Tue, 9 Nov 2021 11:34:28 +0100
-Subject: [PATCH] watchdog: bcm7038_wdt: allow building on ARCH_BCM4908
+Date: Wed, 9 Feb 2022 21:32:02 +0100
+Subject: [PATCH] watchdog: allow building BCM7038_WDT for BCM4908
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
-The same hardware block is present on BCM4908 SoCs family.
+BCM4908 is a SoCs family that shares a lot of hardware with BCM63xx
+including the watchdog block. Allow building this driver for it.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
+Acked-by: Florian Fainelli <f.fainelli@gmail.com>
+Reviewed-by: Guenter Roeck <linux@roeck-us.net>
---
drivers/watchdog/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- /dev/null
+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
+Date: Wed, 16 Feb 2022 07:28:34 +0100
+Subject: [PATCH] watchdog: bcm7038_wdt: Support BCM6345 compatible string
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+A new "compatible" value has been added in the commit 17fffe91ba36
+("dt-bindings: watchdog: Add BCM6345 compatible to BCM7038 binding").
+It's meant to be used for BCM63xx SoCs family but hardware block can be
+programmed just like the 7038 one.
+
+Cc: Florian Fainelli <f.fainelli@gmail.com>
+Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
+---
+ drivers/watchdog/bcm7038_wdt.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/drivers/watchdog/bcm7038_wdt.c
++++ b/drivers/watchdog/bcm7038_wdt.c
+@@ -193,6 +193,7 @@ static SIMPLE_DEV_PM_OPS(bcm7038_wdt_pm_
+ bcm7038_wdt_resume);
+
+ static const struct of_device_id bcm7038_wdt_match[] = {
++ { .compatible = "brcm,bcm6345-wdt" },
+ { .compatible = "brcm,bcm7038-wdt" },
+ {},
+ };
--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
-@@ -281,7 +281,7 @@
+@@ -290,7 +290,7 @@
gpio0: gpio-controller@500 {
compatible = "brcm,bcm6345-gpio";
reg-names = "dirout", "dat";
projects / thirdparty / openwrt.git / commitdiff
