[arm] PR target/82518: Return false in ARRAY_MODE_SUPPORTED_P for BYTES_BIG_ENDIAN

	Backport from mainline
	2018-03-20  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	PR target/82518
	* config/arm/arm.c (arm_array_mode_supported_p): Return false for
	BYTES_BIG_ENDIAN.

	* lib/target-supports.exp (check_effective_target_vect_load_lanes):
	Disable for armeb targets.
	* gcc.target/arm/pr82518.c: New test.

From-SVN: r258879

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index c9cc508e7fe4fe6187827405b20800d3aae5f770..f02d5695499e211251397a3577a6aa82a0c7e3a5 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,12 @@
+2018-03-27  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+
+       Backport from mainline
+       2018-03-20  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+
+       PR target/82518
+       * config/arm/arm.c (arm_array_mode_supported_p): Return false for
+       BYTES_BIG_ENDIAN.
+
 2018-03-22  Tom de Vries  <tom@codesourcery.com>
 
        backport from trunk:

diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index e3da9f77fb669de6f8c0e45ec5870a7c323e9332..5a47dffd60d75f4e55498bd348aa80b20fd73241 100644 (file)
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -26740,7 +26740,10 @@ static bool
 arm_array_mode_supported_p (machine_mode mode,
                            unsigned HOST_WIDE_INT nelems)
 {
-  if (TARGET_NEON
+  /* We don't want to enable interleaved loads and stores for BYTES_BIG_ENDIAN
+     for now, as the lane-swapping logic needs to be extended in the expanders.
+     See PR target/82518.  */
+  if (TARGET_NEON && !BYTES_BIG_ENDIAN
       && (VALID_NEON_DREG_MODE (mode) || VALID_NEON_QREG_MODE (mode))
       && (nelems >= 2 && nelems <= 4))
     return true;

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 6f2176bfada8e1d830befe46f734ec0b63d67832..9f745cf9e4dec753734ff457d9d948f21952d3f1 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,13 @@
+2018-03-27  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+
+       Backport from mainline
+       2018-03-20  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+
+       PR target/82518
+       * lib/target-supports.exp (check_effective_target_vect_load_lanes):
+       Disable for armeb targets.
+       * gcc.target/arm/pr82518.c: New test.
+
 2018-03-22  Tom de Vries  <tom@codesourcery.com>
 
        backport from trunk:

diff --git a/gcc/testsuite/gcc.target/arm/pr82518.c b/gcc/testsuite/gcc.target/arm/pr82518.c
new file mode 100644 (file)
index 0000000..ce820b7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/pr82518.c
@@ -0,0 +1,29 @@
+/* { dg-do run } */
+/* { dg-require-effective-target arm_neon_hw } */
+/* { dg-additional-options "-O3 -fno-inline -std=gnu99" } */
+/* { dg-add-options arm_neon } */
+
+typedef struct { int x, y; } X;
+
+void f4(X *p, int n)
+{
+  for (int i = 0; i < n; i++)
+  { p[i].x = i;
+    p[i].y = i + 1;
+  }
+}
+
+__attribute ((aligned (16))) X arr[100];
+
+int main(void)
+{
+  volatile int fail = 0;
+  f4 (arr, 100);
+  for (int i = 0; i < 100; i++)
+    if (arr[i].y != i+1 || arr[i].x != i)
+      fail = 1;
+  if (fail)
+     __builtin_abort ();
+
+  return 0;
+}

diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
index 7134534e87a5c714c246d0e7abc14a3fa39fae7d..78b818cbeafc89240813474adba73a05b443aebb 100644 (file)
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -5001,7 +5001,8 @@ proc check_effective_target_vect_load_lanes { } {
        verbose "check_effective_target_vect_load_lanes: using cached result" 2
     } else {
        set et_vect_load_lanes 0
-       if { ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok])
+       # We don't support load_lanes correctly on big-endian arm.
+       if { ([istarget arm-*-*] && [check_effective_target_arm_neon_ok])
             || [istarget aarch64*-*-*] } {
            set et_vect_load_lanes 1
        }