* Copyright 2025 NXP
*/
-#include <linux/arm-smccc.h>
+#include <linux/firmware/imx/sm.h>
#include "imx-common.h"
-#define IMX_SIP_SRC 0xC2000005
-#define IMX_SIP_SRC_M_RESET_ADDR_SET 0x03
-
-#define IMX95_CPU_VEC_FLAGS_BOOT BIT(29)
-
-#define IMX_SIP_LMM 0xC200000F
-#define IMX_SIP_LMM_BOOT 0x0
-#define IMX_SIP_LMM_SHUTDOWN 0x1
-
+#define IMX95_M7_CPU_ID 0x1
#define IMX95_M7_LM_ID 0x1
static struct snd_soc_dai_driver imx95_dai[] = {
static int imx95_chip_probe(struct snd_sof_dev *sdev)
{
- struct arm_smccc_res smc_res;
struct platform_device *pdev;
struct resource *res;
return dev_err_probe(sdev->dev, -ENODEV,
"failed to fetch SRAM region\n");
- /* set core boot reset address */
- arm_smccc_smc(IMX_SIP_SRC, IMX_SIP_SRC_M_RESET_ADDR_SET, res->start,
- IMX95_CPU_VEC_FLAGS_BOOT, 0, 0, 0, 0, &smc_res);
-
- return smc_res.a0;
+ return scmi_imx_lmm_reset_vector_set(IMX95_M7_LM_ID, IMX95_M7_CPU_ID,
+ 0, res->start);
}
static int imx95_core_kick(struct snd_sof_dev *sdev)
{
- struct arm_smccc_res smc_res;
-
- arm_smccc_smc(IMX_SIP_LMM, IMX_SIP_LMM_BOOT,
- IMX95_M7_LM_ID, 0, 0, 0, 0, 0, &smc_res);
-
- return smc_res.a0;
+ return scmi_imx_lmm_operation(IMX95_M7_LM_ID, SCMI_IMX_LMM_BOOT, 0);
}
static int imx95_core_shutdown(struct snd_sof_dev *sdev)
{
- struct arm_smccc_res smc_res;
-
- arm_smccc_smc(IMX_SIP_LMM, IMX_SIP_LMM_SHUTDOWN,
- IMX95_M7_LM_ID, 0, 0, 0, 0, 0, &smc_res);
-
- return smc_res.a0;
+ return scmi_imx_lmm_operation(IMX95_M7_LM_ID,
+ SCMI_IMX_LMM_SHUTDOWN,
+ SCMI_IMX_LMM_OP_FORCEFUL);
}
static const struct imx_chip_ops imx95_chip_ops = {