drm/xe: Extract xe_hw_engine_setup_reg_lrc()

The steps for processing RTP rules that build up an engine's reg_lrc
arguably belongs to xe_hw_engine.c and should be encapsulated into a
function in that unit.

Move that logic to a new function called xe_hw_engine_setup_reg_lrc().

Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patch.msgid.link/20260514-rtp-mcr-check-v3-4-30dd47855fee@intel.com
Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>

diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c
index cdc678d1ae1f1b236fa32855ac3c8a56feb7d2f8..c4b25daad5422642bea3c038475713568d348e00 100644 (file)
--- a/drivers/gpu/drm/xe/xe_gt.c
+++ b/drivers/gpu/drm/xe/xe_gt.c
@@ -393,10 +393,7 @@ int xe_gt_record_default_lrcs(struct xe_gt *gt)
                if (gt->default_lrc[hwe->class])
                        continue;
 
-               xe_reg_sr_init(&hwe->reg_lrc, hwe->name, xe);
-               xe_wa_process_lrc(hwe);
-               xe_hw_engine_setup_default_lrc_state(hwe);
-               xe_tuning_process_lrc(hwe);
+               xe_hw_engine_setup_reg_lrc(hwe);
 
                default_lrc = drmm_kzalloc(&xe->drm,
                                           xe_gt_lrc_size(gt, hwe->class),

diff --git a/drivers/gpu/drm/xe/xe_hw_engine.c b/drivers/gpu/drm/xe/xe_hw_engine.c
index 0f0e08bcc182fbcec14ac8d364c462dc1f4795dc..05f0932dbb9482839d79f9ca328f90900e907806 100644 (file)
--- a/drivers/gpu/drm/xe/xe_hw_engine.c
+++ b/drivers/gpu/drm/xe/xe_hw_engine.c
@@ -337,8 +337,8 @@ static bool xe_rtp_cfeg_wmtp_disabled(const struct xe_device *xe,
        return xe_mmio_read32(&hwe->gt->mmio, XEHP_FUSE4) & CFEG_WMTP_DISABLE;
 }
 
-void
-xe_hw_engine_setup_default_lrc_state(struct xe_hw_engine *hwe)
+static void
+hw_engine_setup_default_lrc_state(struct xe_hw_engine *hwe)
 {
        struct xe_gt *gt = hwe->gt;
        const u8 mocs_write_idx = gt->mocs.uc_index;
@@ -375,6 +375,17 @@ xe_hw_engine_setup_default_lrc_state(struct xe_hw_engine *hwe)
                             &hwe->reg_lrc, true);
 }
 
+void xe_hw_engine_setup_reg_lrc(struct xe_hw_engine *hwe)
+{
+       struct xe_gt *gt = hwe->gt;
+       struct xe_device *xe = gt_to_xe(gt);
+
+       xe_reg_sr_init(&hwe->reg_lrc, hwe->name, xe);
+       xe_wa_process_lrc(hwe);
+       hw_engine_setup_default_lrc_state(hwe);
+       xe_tuning_process_lrc(hwe);
+}
+
 static void
 hw_engine_setup_default_state(struct xe_hw_engine *hwe)
 {

diff --git a/drivers/gpu/drm/xe/xe_hw_engine.h b/drivers/gpu/drm/xe/xe_hw_engine.h
index ee9218773b51a15cd77643c92ab05653bfb9a2f7..c3ee37f8cfc0ed5d15d83ab8ee21dd9e03a51e2d 100644 (file)
--- a/drivers/gpu/drm/xe/xe_hw_engine.h
+++ b/drivers/gpu/drm/xe/xe_hw_engine.h
@@ -59,7 +59,7 @@ struct xe_hw_engine_snapshot *
 xe_hw_engine_snapshot_capture(struct xe_hw_engine *hwe, struct xe_exec_queue *q);
 void xe_hw_engine_snapshot_free(struct xe_hw_engine_snapshot *snapshot);
 void xe_hw_engine_print(struct xe_hw_engine *hwe, struct drm_printer *p);
-void xe_hw_engine_setup_default_lrc_state(struct xe_hw_engine *hwe);
+void xe_hw_engine_setup_reg_lrc(struct xe_hw_engine *hwe);
 
 bool xe_hw_engine_is_reserved(struct xe_hw_engine *hwe);