]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
ASoC: tegra: set reg_default_cb callback
authorSheetal <sheetal@nvidia.com>
Fri, 23 Jan 2026 09:53:45 +0000 (15:23 +0530)
committerMark Brown <broonie@kernel.org>
Wed, 28 Jan 2026 12:12:17 +0000 (12:12 +0000)
Set reg_default_cb so REGCACHE_FLAT can supply zero defaults without
large reg_defaults tables, simplifying cache initialization for
zero-reset registers.

Signed-off-by: Sheetal <sheetal@nvidia.com>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Tested-by: Jon Hunter <jonathanh@nvidia.com>
Link: https://patch.msgid.link/20260123095346.1258556-4-sheetal@nvidia.com
Signed-off-by: Mark Brown <broonie@kernel.org>
14 files changed:
sound/soc/tegra/tegra186_asrc.c
sound/soc/tegra/tegra186_dspk.c
sound/soc/tegra/tegra210_admaif.c
sound/soc/tegra/tegra210_adx.c
sound/soc/tegra/tegra210_ahub.c
sound/soc/tegra/tegra210_amx.c
sound/soc/tegra/tegra210_dmic.c
sound/soc/tegra/tegra210_i2s.c
sound/soc/tegra/tegra210_mbdrc.c
sound/soc/tegra/tegra210_mixer.c
sound/soc/tegra/tegra210_mvc.c
sound/soc/tegra/tegra210_ope.c
sound/soc/tegra/tegra210_peq.c
sound/soc/tegra/tegra210_sfc.c

index 2c0220e14a570dca6c8a28f0069a33310a6d344f..d2a5ec7c54cc7db03496a407ae97091cc125076d 100644 (file)
@@ -950,6 +950,7 @@ static const struct regmap_config tegra186_asrc_regmap_config = {
        .volatile_reg           = tegra186_asrc_volatile_reg,
        .reg_defaults           = tegra186_asrc_reg_defaults,
        .num_reg_defaults       = ARRAY_SIZE(tegra186_asrc_reg_defaults),
+       .reg_default_cb         = regmap_default_zero_cb,
        .cache_type             = REGCACHE_FLAT,
 };
 
index a762150db802ab6653f4edb16694e9e247a27c20..8816e49673315f21fb068f396b2923484f674789 100644 (file)
@@ -467,6 +467,7 @@ static const struct regmap_config tegra186_dspk_regmap = {
        .volatile_reg           = tegra186_dspk_volatile_reg,
        .reg_defaults           = tegra186_dspk_reg_defaults,
        .num_reg_defaults       = ARRAY_SIZE(tegra186_dspk_reg_defaults),
+       .reg_default_cb         = regmap_default_zero_cb,
        .cache_type             = REGCACHE_FLAT,
 };
 
index f9f6040c4e3465ea11aa2320224aff4b9af3d87e..0976779d29f286617fae249d4553831e22c15eb3 100644 (file)
@@ -241,6 +241,7 @@ static const struct regmap_config tegra210_admaif_regmap_config = {
        .volatile_reg           = tegra_admaif_volatile_reg,
        .reg_defaults           = tegra210_admaif_reg_defaults,
        .num_reg_defaults       = TEGRA210_ADMAIF_CHANNEL_COUNT * 6 + 1,
+       .reg_default_cb         = regmap_default_zero_cb,
        .cache_type             = REGCACHE_FLAT,
 };
 
@@ -254,6 +255,7 @@ static const struct regmap_config tegra186_admaif_regmap_config = {
        .volatile_reg           = tegra_admaif_volatile_reg,
        .reg_defaults           = tegra186_admaif_reg_defaults,
        .num_reg_defaults       = TEGRA186_ADMAIF_CHANNEL_COUNT * 6 + 1,
+       .reg_default_cb         = regmap_default_zero_cb,
        .cache_type             = REGCACHE_FLAT,
 };
 
@@ -267,6 +269,7 @@ static const struct regmap_config tegra264_admaif_regmap_config = {
        .volatile_reg           = tegra_admaif_volatile_reg,
        .reg_defaults           = tegra264_admaif_reg_defaults,
        .num_reg_defaults       = TEGRA264_ADMAIF_CHANNEL_COUNT * 6 + 1,
+       .reg_default_cb         = regmap_default_zero_cb,
        .cache_type             = REGCACHE_FLAT,
 };
 
index 6c9a410085bc558ac5f631f5ebf5eca0fa8ea0d4..95875c75ddf87d51867a6adffc6a925f6c6c7b75 100644 (file)
@@ -625,6 +625,7 @@ static const struct regmap_config tegra210_adx_regmap_config = {
        .volatile_reg           = tegra210_adx_volatile_reg,
        .reg_defaults           = tegra210_adx_reg_defaults,
        .num_reg_defaults       = ARRAY_SIZE(tegra210_adx_reg_defaults),
+       .reg_default_cb         = regmap_default_zero_cb,
        .cache_type             = REGCACHE_FLAT,
 };
 
@@ -638,6 +639,7 @@ static const struct regmap_config tegra264_adx_regmap_config = {
        .volatile_reg           = tegra264_adx_volatile_reg,
        .reg_defaults           = tegra264_adx_reg_defaults,
        .num_reg_defaults       = ARRAY_SIZE(tegra264_adx_reg_defaults),
+       .reg_default_cb         = regmap_default_zero_cb,
        .cache_type             = REGCACHE_FLAT,
 };
 
index fc5892056f832fa95363e29ca8284776a8e25f80..43a45f785d5bd1d567f2e71fd6a59f5e54023734 100644 (file)
@@ -2133,6 +2133,7 @@ static const struct regmap_config tegra210_ahub_regmap_config = {
        .reg_stride             = 4,
        .writeable_reg          = tegra210_ahub_wr_reg,
        .max_register           = TEGRA210_MAX_REGISTER_ADDR,
+       .reg_default_cb         = regmap_default_zero_cb,
        .cache_type             = REGCACHE_FLAT,
 };
 
@@ -2142,6 +2143,7 @@ static const struct regmap_config tegra186_ahub_regmap_config = {
        .reg_stride             = 4,
        .writeable_reg          = tegra186_ahub_wr_reg,
        .max_register           = TEGRA186_MAX_REGISTER_ADDR,
+       .reg_default_cb         = regmap_default_zero_cb,
        .cache_type             = REGCACHE_FLAT,
 };
 
@@ -2151,6 +2153,7 @@ static const struct regmap_config tegra264_ahub_regmap_config = {
        .reg_stride             = 4,
        .writeable_reg          = tegra264_ahub_wr_reg,
        .max_register           = TEGRA264_MAX_REGISTER_ADDR,
+       .reg_default_cb         = regmap_default_zero_cb,
        .cache_type             = REGCACHE_FLAT,
 };
 
index c94f8c84e04f45ca380bbf23aeafcc349d5f4634..bfda825052980af4ebee9ec6ed596a7937235018 100644 (file)
@@ -654,6 +654,7 @@ static const struct regmap_config tegra210_amx_regmap_config = {
        .volatile_reg           = tegra210_amx_volatile_reg,
        .reg_defaults           = tegra210_amx_reg_defaults,
        .num_reg_defaults       = ARRAY_SIZE(tegra210_amx_reg_defaults),
+       .reg_default_cb         = regmap_default_zero_cb,
        .cache_type             = REGCACHE_FLAT,
 };
 
@@ -667,6 +668,7 @@ static const struct regmap_config tegra194_amx_regmap_config = {
        .volatile_reg           = tegra210_amx_volatile_reg,
        .reg_defaults           = tegra210_amx_reg_defaults,
        .num_reg_defaults       = ARRAY_SIZE(tegra210_amx_reg_defaults),
+       .reg_default_cb         = regmap_default_zero_cb,
        .cache_type             = REGCACHE_FLAT,
 };
 
@@ -680,6 +682,7 @@ static const struct regmap_config tegra264_amx_regmap_config = {
        .volatile_reg           = tegra264_amx_volatile_reg,
        .reg_defaults           = tegra264_amx_reg_defaults,
        .num_reg_defaults       = ARRAY_SIZE(tegra264_amx_reg_defaults),
+       .reg_default_cb         = regmap_default_zero_cb,
        .cache_type             = REGCACHE_FLAT,
 };
 
index 66fff53aeaa69889e67d7b477c0f1b8f0becd33e..93def7ac4fdebf1a84f1928200702294ea9d8f89 100644 (file)
@@ -483,6 +483,7 @@ static const struct regmap_config tegra210_dmic_regmap_config = {
        .volatile_reg = tegra210_dmic_volatile_reg,
        .reg_defaults = tegra210_dmic_reg_defaults,
        .num_reg_defaults = ARRAY_SIZE(tegra210_dmic_reg_defaults),
+       .reg_default_cb         = regmap_default_zero_cb,
        .cache_type = REGCACHE_FLAT,
 };
 
index b91e0e6cd7fe2db21ea5c7595a07ea788ad68153..d8e02f0a3025ae8b7c590810b5717395bc5a0f2b 100644 (file)
@@ -997,6 +997,7 @@ static const struct regmap_config tegra210_regmap_conf = {
        .volatile_reg           = tegra210_i2s_volatile_reg,
        .reg_defaults           = tegra210_i2s_reg_defaults,
        .num_reg_defaults       = ARRAY_SIZE(tegra210_i2s_reg_defaults),
+       .reg_default_cb         = regmap_default_zero_cb,
        .cache_type             = REGCACHE_FLAT,
 };
 
@@ -1044,6 +1045,7 @@ static const struct regmap_config tegra264_regmap_conf = {
        .volatile_reg           = tegra264_i2s_volatile_reg,
        .reg_defaults           = tegra264_i2s_reg_defaults,
        .num_reg_defaults       = ARRAY_SIZE(tegra264_i2s_reg_defaults),
+       .reg_default_cb         = regmap_default_zero_cb,
        .cache_type             = REGCACHE_FLAT,
 };
 
index 09fe3c5cf540d8eebd64385acd5ffeec36ed2c7b..6a268dbb71978c664bc24e49e63b03cfef8f287e 100644 (file)
@@ -763,6 +763,7 @@ static const struct regmap_config tegra210_mbdrc_regmap_cfg = {
        .precious_reg           = tegra210_mbdrc_precious_reg,
        .reg_defaults           = tegra210_mbdrc_reg_defaults,
        .num_reg_defaults       = ARRAY_SIZE(tegra210_mbdrc_reg_defaults),
+       .reg_default_cb         = regmap_default_zero_cb,
        .cache_type             = REGCACHE_FLAT,
 };
 
index ff8e9f2d7abfd056a19ecd4a16c44447e0ab4d69..6d3a2b76fd6174b1a4a8f8c2df6cd39cbeb89977 100644 (file)
@@ -608,6 +608,7 @@ static const struct regmap_config tegra210_mixer_regmap_config = {
        .precious_reg           = tegra210_mixer_precious_reg,
        .reg_defaults           = tegra210_mixer_reg_defaults,
        .num_reg_defaults       = ARRAY_SIZE(tegra210_mixer_reg_defaults),
+       .reg_default_cb         = regmap_default_zero_cb,
        .cache_type             = REGCACHE_FLAT,
 };
 
index 779d4c199da939976f2c0b3e42b82c39e73b79de..6cdc5e1f550738a5d16bca18cc602723af5ccdca 100644 (file)
@@ -699,6 +699,7 @@ static const struct regmap_config tegra210_mvc_regmap_config = {
        .volatile_reg           = tegra210_mvc_volatile_reg,
        .reg_defaults           = tegra210_mvc_reg_defaults,
        .num_reg_defaults       = ARRAY_SIZE(tegra210_mvc_reg_defaults),
+       .reg_default_cb         = regmap_default_zero_cb,
        .cache_type             = REGCACHE_FLAT,
 };
 
index 27db70af27469929f2ba9df4a8599670a31ebc5e..a440888dcdbdf71018a495e837524844047bdf57 100644 (file)
@@ -297,6 +297,7 @@ static const struct regmap_config tegra210_ope_regmap_config = {
        .volatile_reg           = tegra210_ope_volatile_reg,
        .reg_defaults           = tegra210_ope_reg_defaults,
        .num_reg_defaults       = ARRAY_SIZE(tegra210_ope_reg_defaults),
+       .reg_default_cb         = regmap_default_zero_cb,
        .cache_type             = REGCACHE_FLAT,
 };
 
index 9a05e6913276c7675ce3ba361ae0b83c3a132f8a..2f72e9d541dca7b7e38de969112082b02d3055cf 100644 (file)
@@ -306,6 +306,7 @@ static const struct regmap_config tegra210_peq_regmap_config = {
        .precious_reg           = tegra210_peq_precious_reg,
        .reg_defaults           = tegra210_peq_reg_defaults,
        .num_reg_defaults       = ARRAY_SIZE(tegra210_peq_reg_defaults),
+       .reg_default_cb         = regmap_default_zero_cb,
        .cache_type             = REGCACHE_FLAT,
 };
 
index d6341968bebeeb0d1528c7c1b2f49767c8ae1116..b298bf0421b1220056261e8a16ed570919ea56e5 100644 (file)
@@ -3569,6 +3569,7 @@ static const struct regmap_config tegra210_sfc_regmap_config = {
        .precious_reg           = tegra210_sfc_precious_reg,
        .reg_defaults           = tegra210_sfc_reg_defaults,
        .num_reg_defaults       = ARRAY_SIZE(tegra210_sfc_reg_defaults),
+       .reg_default_cb         = regmap_default_zero_cb,
        .cache_type             = REGCACHE_FLAT,
 };