]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
ice: add 40G speed to Admin Command GET PORT OPTION
authorAleksandr Loktionov <aleksandr.loktionov@intel.com>
Fri, 16 May 2025 14:42:14 +0000 (14:42 +0000)
committerTony Nguyen <anthony.l.nguyen@intel.com>
Fri, 18 Jul 2025 16:02:28 +0000 (09:02 -0700)
Introduce the ICE_AQC_PORT_OPT_MAX_LANE_40G constant and update the code
to process this new option in both the devlink and the Admin Queue Command
GET PORT OPTION (opcode 0x06EA) message, similar to existing constants like
ICE_AQC_PORT_OPT_MAX_LANE_50G, ICE_AQC_PORT_OPT_MAX_LANE_100G, and so on.

This feature allows the driver to correctly report configuration options
for 2x40G on E823 and other cards in the future via devlink.

Example command:
 devlink port split pci/0000:01:00.0/0 count 2

Example dmesg:
 ice 0000:01:00.0: Available port split options and max port speeds (Gbps):
 ice 0000:01:00.0: Status  Split      Quad 0          Quad 1
 ice 0000:01:00.0:         count  L0  L1  L2  L3  L4  L5  L6  L7
 ice 0000:01:00.0:         2      40   -   -   -  40   -   -   -
 ice 0000:01:00.0:         2      50   -  50   -   -   -   -   -
 ice 0000:01:00.0:         4      25  25  25  25   -   -   -   -
 ice 0000:01:00.0:         4      25  25   -   -  25  25   -   -
 ice 0000:01:00.0: Active  8      10  10  10  10  10  10  10  10
 ice 0000:01:00.0:         1     100   -   -   -   -   -   -   -

Signed-off-by: Aleksandr Loktionov <aleksandr.loktionov@intel.com>
Reviewed-by: Przemek Kitszel <przemyslaw.kitszel@intel.com>
Reviewed-by: Simon Horman <horms@kernel.org>
Reviewed-by: Paul Menzel <pmenzel@molgen.mpg.de>
Tested-by: Rinitha S <sx.rinitha@intel.com> (A Contingent worker at Intel)
Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
drivers/net/ethernet/intel/ice/devlink/port.c
drivers/net/ethernet/intel/ice/ice_adminq_cmd.h
drivers/net/ethernet/intel/ice/ice_common.c
drivers/net/ethernet/intel/ice/ice_ethtool.c

index 767419a67fef2bac3b8db82baa1c64e8e2ee25f9..63fb36fc4b3da34cbf57d098786c50fc718f94cf 100644 (file)
@@ -30,6 +30,8 @@ static const char *ice_devlink_port_opt_speed_str(u8 speed)
                return "10";
        case ICE_AQC_PORT_OPT_MAX_LANE_25G:
                return "25";
+       case ICE_AQC_PORT_OPT_MAX_LANE_40G:
+               return "40";
        case ICE_AQC_PORT_OPT_MAX_LANE_50G:
                return "50";
        case ICE_AQC_PORT_OPT_MAX_LANE_100G:
index 97f9ebd62d93e178e2e104ee1f5bed1d08d8a77d..39d99c2f7976c63edfd894218d854d647002120e 100644 (file)
@@ -1684,6 +1684,7 @@ struct ice_aqc_get_port_options_elem {
 #define ICE_AQC_PORT_OPT_MAX_LANE_50G  6
 #define ICE_AQC_PORT_OPT_MAX_LANE_100G 7
 #define ICE_AQC_PORT_OPT_MAX_LANE_200G 8
+#define ICE_AQC_PORT_OPT_MAX_LANE_40G  9
 
        u8 global_scid[2];
        u8 phy_scid[2];
index 1b435e108d3c7269bfdd19b8cf77b1f16ca8e839..b4fe096ace08c97c933fac9d8e4a43e38da53a5f 100644 (file)
@@ -4307,7 +4307,7 @@ int ice_get_phy_lane_number(struct ice_hw *hw)
 
                speed = options[active_idx].max_lane_speed;
                /* If we don't get speed for this lane, it's unoccupied */
-               if (speed > ICE_AQC_PORT_OPT_MAX_LANE_200G)
+               if (speed > ICE_AQC_PORT_OPT_MAX_LANE_40G)
                        continue;
 
                if (hw->pf_id == lport) {
index e54221fba849526896360296a7d1c3460706315f..58ed875093cf9f1667fada7fe5ddc341043ac4c7 100644 (file)
@@ -667,7 +667,8 @@ static int ice_get_port_topology(struct ice_hw *hw, u8 lport,
 
                if (max_speed == ICE_AQC_PORT_OPT_MAX_LANE_100G)
                        port_topology->serdes_lane_count = 4;
-               else if (max_speed == ICE_AQC_PORT_OPT_MAX_LANE_50G)
+               else if (max_speed == ICE_AQC_PORT_OPT_MAX_LANE_50G ||
+                        max_speed == ICE_AQC_PORT_OPT_MAX_LANE_40G)
                        port_topology->serdes_lane_count = 2;
                else
                        port_topology->serdes_lane_count = 1;