]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
mtd: spi-nor: swp: check SR_TB flag when getting tb_mask
authorShiji Yang <yangshiji66@outlook.com>
Wed, 28 Jan 2026 12:42:56 +0000 (20:42 +0800)
committerPratyush Yadav (Google) <pratyush@kernel.org>
Fri, 13 Mar 2026 11:13:46 +0000 (11:13 +0000)
When the chip does not support top/bottom block protect, the tb_mask
must be set to 0, otherwise SR1 bit5 will be unexpectedly modified.

Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Fixes: 3dd8012a8eeb ("mtd: spi-nor: add TB (Top/Bottom) protect support")
Reviewed-by: Michael Walle <mwalle@kernel.org>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Pratyush Yadav (Google) <pratyush@kernel.org>
drivers/mtd/spi-nor/swp.c

index 9b07f83aeac76dce2109f90dfa1534c9bd93330d..e67a81dbb6bf6d12018158aa30749de27a7388aa 100644 (file)
@@ -28,8 +28,10 @@ static u8 spi_nor_get_sr_tb_mask(struct spi_nor *nor)
 {
        if (nor->flags & SNOR_F_HAS_SR_TB_BIT6)
                return SR_TB_BIT6;
-       else
+       else if (nor->flags & SNOR_F_HAS_SR_TB)
                return SR_TB_BIT5;
+       else
+               return 0;
 }
 
 static u64 spi_nor_get_min_prot_length_sr(struct spi_nor *nor)