arm_mpam: Fix software reset values of MPAMCFG_PRI

Priority partitioning is not supported other than to set the per-PARTID
defaults in MPAMCFG_PRI, INTPRI and DSPRI, to the highest priority. When 0
is the lowest priority, all ones is the highest priority. However, these
values are calculated with an extra higher bit set.

Luckily, there is still no chance of setting functional bits incorrectly.
When the priority widths are maximal, this is ensured as the fields have
width 16 and a u16 holds the value for each field. When the widths are
smaller, the higher order bits beyond the advertised widths,
MPAMF_PRI_IDR.DSPRI_WD and MPAMF_PRI_IDR.INTPRI_WD, in the priority fields
INTPRI and DSPRI are not used to calculate the priority.  It is not
specified whether these higher order bits are RAZ/WI or Res0 and so it is
desirable not to set them to avoid the chance of misleading reads.

Correct the priority reset values.

Fixes: 880df85d8673 ("arm_mpam: Probe and reset the rest of the features")
Signed-off-by: Ben Horgan <ben.horgan@arm.com>
Signed-off-by: Will Deacon <will@kernel.org>

diff --git a/drivers/resctrl/mpam_devices.c b/drivers/resctrl/mpam_devices.c
index b69f99488111153254a6326646b9dd33c687a958..37ce11d7db92b55247b6a092a1c355d8b96c27d8 100644 (file)
--- a/drivers/resctrl/mpam_devices.c
+++ b/drivers/resctrl/mpam_devices.c
@@ -1552,12 +1552,9 @@ static u16 mpam_wa_t241_calc_min_from_max(struct mpam_props *props,
 static void mpam_reprogram_ris_partid(struct mpam_msc_ris *ris, u16 partid,
                                      struct mpam_config *cfg)
 {
-       u32 pri_val = 0;
        u16 cmax = MPAMCFG_CMAX_CMAX;
        struct mpam_msc *msc = ris->vmsc->msc;
        struct mpam_props *rprops = &ris->props;
-       u16 dspri = GENMASK(rprops->dspri_wd, 0);
-       u16 intpri = GENMASK(rprops->intpri_wd, 0);
 
        mutex_lock(&msc->part_sel_lock);
        __mpam_part_sel(ris->ris_idx, partid, msc);
@@ -1622,16 +1619,25 @@ static void mpam_reprogram_ris_partid(struct mpam_msc_ris *ris, u16 partid,
 
        if (mpam_has_feature(mpam_feat_intpri_part, rprops) ||
            mpam_has_feature(mpam_feat_dspri_part, rprops)) {
-               /* aces high? */
-               if (!mpam_has_feature(mpam_feat_intpri_part_0_low, rprops))
-                       intpri = 0;
-               if (!mpam_has_feature(mpam_feat_dspri_part_0_low, rprops))
-                       dspri = 0;
+               u32 pri_val = 0;
+
+               if (mpam_has_feature(mpam_feat_intpri_part, rprops)) {
+                       u16 intpri = GENMASK(rprops->intpri_wd - 1, 0);
+
+                       /* aces high? */
+                       if (!mpam_has_feature(mpam_feat_intpri_part_0_low, rprops))
+                               intpri = 0;
 
-               if (mpam_has_feature(mpam_feat_intpri_part, rprops))
                        pri_val |= FIELD_PREP(MPAMCFG_PRI_INTPRI, intpri);
-               if (mpam_has_feature(mpam_feat_dspri_part, rprops))
+               }
+               if (mpam_has_feature(mpam_feat_dspri_part, rprops)) {
+                       u16 dspri = GENMASK(rprops->dspri_wd - 1, 0);
+
+                       if (!mpam_has_feature(mpam_feat_dspri_part_0_low, rprops))
+                               dspri = 0;
+
                        pri_val |= FIELD_PREP(MPAMCFG_PRI_DSPRI, dspri);
+               }
 
                mpam_write_partsel_reg(msc, PRI, pri_val);
        }