backport: arm.h (TARGET_HAVE_DMB_MCR): MCR Not available in Thumb1.

2012-06-19  Joey Ye  <joey.ye@arm.com>

	Backported from mainline
	2011-10-14  David Alan Gilbert  <david.gilbert@linaro.org>

	* config/arm/arm.h (TARGET_HAVE_DMB_MCR): MCR Not available in Thumb1.

From-SVN: r188774

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 6a30d39d8d5a825cf258ce923aab3e2e165bcb83..868f046804385d17285a4b829b306d068615b673 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+2012-06-19  Joey Ye  <joey.ye@arm.com>
+
+       Backported from mainline
+       2011-10-14  David Alan Gilbert  <david.gilbert@linaro.org>
+
+       * config/arm/arm.h (TARGET_HAVE_DMB_MCR): MCR Not available in Thumb1.
+
 2012-06-18  Joey Ye  <joey.ye@arm.com>
 
        Backported from mainline

diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
index 151d314138173bf0629df0b067b07f4e9ab81fca..292b48f96de8a750dc9b5e9532b35d97a62245a4 100644 (file)
--- a/gcc/config/arm/arm.h
+++ b/gcc/config/arm/arm.h
@@ -294,7 +294,8 @@ extern void (*arm_lang_output_object_attributes_hook)(void);
 #define TARGET_HAVE_DMB                (arm_arch7)
 
 /* Nonzero if this chip implements a memory barrier via CP15.  */
-#define TARGET_HAVE_DMB_MCR    (arm_arch6k && ! TARGET_HAVE_DMB)
+#define TARGET_HAVE_DMB_MCR    (arm_arch6 && ! TARGET_HAVE_DMB \
+                                && ! TARGET_THUMB1)
 
 /* Nonzero if this chip implements a memory barrier instruction.  */
 #define TARGET_HAVE_MEMORY_BARRIER (TARGET_HAVE_DMB || TARGET_HAVE_DMB_MCR)