arm64: dts: socfpga: agilex: add emmc support

The Agilex devkit supports a separate eMMC daughter card. The
eMMC daughter card replaces the SDMMC slot that is on the default
daughter card and thus requires a separate board dts file.

Signed-off-by: Ng Tze Yee <tzeyee.ng@altera.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>

diff --git a/arch/arm64/boot/dts/intel/Makefile b/arch/arm64/boot/dts/intel/Makefile
index b15e9c5083b6b010b57524c0bc7cf4e2a0acc06d..33fcc55d0cb9609c61f488ffcc53e0353a08876e 100644 (file)
--- a/arch/arm64/boot/dts/intel/Makefile
+++ b/arch/arm64/boot/dts/intel/Makefile
@@ -1,6 +1,7 @@
 # SPDX-License-Identifier: GPL-2.0-only
 dtb-$(CONFIG_ARCH_INTEL_SOCFPGA) += socfpga_agilex_n6000.dtb \
                                socfpga_agilex_socdk.dtb \
+                               socfpga_agilex_socdk_emmc.dtb \
                                socfpga_agilex_socdk_nand.dtb \
                                socfpga_agilex3_socdk.dtb \
                                socfpga_agilex5_socdk.dtb \

diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex_socdk_emmc.dts b/arch/arm64/boot/dts/intel/socfpga_agilex_socdk_emmc.dts
new file mode 100644 (file)
index 0000000..1d3a2d7
--- /dev/null
+++ b/arch/arm64/boot/dts/intel/socfpga_agilex_socdk_emmc.dts
@@ -0,0 +1,105 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2026, Altera Corporation
+ */
+#include "socfpga_agilex.dtsi"
+
+/ {
+       model = "SoCFPGA Agilex SoCDK eMMC daughter board";
+       compatible = "intel,socfpga-agilex-socdk-emmc", "intel,socfpga-agilex";
+
+       aliases {
+               serial0 = &uart0;
+               ethernet0 = &gmac0;
+               ethernet1 = &gmac1;
+               ethernet2 = &gmac2;
+       };
+
+       chosen {
+               stdout-path = "serial0:115200n8";
+       };
+
+       leds {
+               compatible = "gpio-leds";
+               led0 {
+                       label = "hps_led0";
+                       gpios = <&portb 20 GPIO_ACTIVE_HIGH>;
+               };
+
+               led1 {
+                       label = "hps_led1";
+                       gpios = <&portb 19 GPIO_ACTIVE_HIGH>;
+               };
+
+               led2 {
+                       label = "hps_led2";
+                       gpios = <&portb 21 GPIO_ACTIVE_HIGH>;
+               };
+       };
+
+       memory@80000000 {
+               device_type = "memory";
+               /* We expect the bootloader to fill in the reg */
+               reg = <0 0x80000000 0 0>;
+       };
+};
+
+&gpio1 {
+       status = "okay";
+};
+
+&gmac2 {
+       status = "okay";
+       /* PHY delays is configured via skew properties */
+       phy-mode = "rgmii";
+       phy-handle = <&phy0>;
+
+       max-frame-size = <9000>;
+
+       mdio0 {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               compatible = "snps,dwmac-mdio";
+               phy0: ethernet-phy@4 {
+                       reg = <4>;
+
+                       txd0-skew-ps = <0>; /* -420ps */
+                       txd1-skew-ps = <0>; /* -420ps */
+                       txd2-skew-ps = <0>; /* -420ps */
+                       txd3-skew-ps = <0>; /* -420ps */
+                       rxd0-skew-ps = <420>; /* 0ps */
+                       rxd1-skew-ps = <420>; /* 0ps */
+                       rxd2-skew-ps = <420>; /* 0ps */
+                       rxd3-skew-ps = <420>; /* 0ps */
+                       txen-skew-ps = <0>; /* -420ps */
+                       txc-skew-ps = <900>; /* 0ps */
+                       rxdv-skew-ps = <420>; /* 0ps */
+                       rxc-skew-ps = <1680>; /* 780ps */
+               };
+       };
+};
+
+&mmc {
+       status = "okay";
+       cap-mmc-highspeed;
+       broken-cd;
+       bus-width = <4>;
+       clk-phase-sd-hs = <0>, <135>;
+};
+
+&osc1 {
+       clock-frequency = <25000000>;
+};
+
+&uart0 {
+       status = "okay";
+};
+
+&usb0 {
+       status = "okay";
+       disable-over-current;
+};
+
+&watchdog0 {
+       status = "okay";
+};