ARM: dts: stm32: Introduce new STM32MP15 SOCs: STM32MP151 and STM32MP153

STM32MP151 and STM32MP153 were not explicitly supported through
stm32mp157c.dts. This commit adds dedicated files to support all STM32MP15
SOCs family.

The differences between those SOCs are:
 -STM32MP151 [1]: common file.
 -STM32MP153 [2]: STM32MP151 + CANs + a second CortexA7-CPU.
 -STM32MP157 [3]: STM32MP153 + DSI + GPU.

[1] https://www.st.com/resource/en/reference_manual/dm00366349.pdf
[2] https://www.st.com/resource/en/reference_manual/dm00366355.pdf
[3] https://www.st.com/resource/en/reference_manual/dm00327659.pdf

Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>

diff --git a/arch/arm/boot/dts/stm32mp157c.dtsi b/arch/arm/boot/dts/stm32mp151.dtsi
similarity index 96%
rename from arch/arm/boot/dts/stm32mp157c.dtsi
rename to arch/arm/boot/dts/stm32mp151.dtsi
index ce641c4359cfb77382e64234f1edaaa1888f81e3..9a0b55be134d33980fa12f153575c99beb6bc627 100644 (file)
--- a/arch/arm/boot/dts/stm32mp157c.dtsi
+++ b/arch/arm/boot/dts/stm32mp151.dtsi
@@ -20,12 +20,6 @@
                        device_type = "cpu";
                        reg = <0>;
                };
-
-               cpu1: cpu@1 {
-                       compatible = "arm,cortex-a7";
-                       device_type = "cpu";
-                       reg = <1>;
-               };
        };
 
        psci {
@@ -953,32 +947,6 @@
                        };
                };
 
-               m_can1: can@4400e000 {
-                       compatible = "bosch,m_can";
-                       reg = <0x4400e000 0x400>, <0x44011000 0x1400>;
-                       reg-names = "m_can", "message_ram";
-                       interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
-                                    <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
-                       interrupt-names = "int0", "int1";
-                       clocks = <&rcc CK_HSE>, <&rcc FDCAN_K>;
-                       clock-names = "hclk", "cclk";
-                       bosch,mram-cfg = <0x0 0 0 32 0 0 2 2>;
-                       status = "disabled";
-               };
-
-               m_can2: can@4400f000 {
-                       compatible = "bosch,m_can";
-                       reg = <0x4400f000 0x400>, <0x44011000 0x2800>;
-                       reg-names = "m_can", "message_ram";
-                       interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,
-                                    <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
-                       interrupt-names = "int0", "int1";
-                       clocks = <&rcc CK_HSE>, <&rcc FDCAN_K>;
-                       clock-names = "hclk", "cclk";
-                       bosch,mram-cfg = <0x1400 0 0 32 0 0 2 2>;
-                       status = "disabled";
-               };
-
                dma1: dma@48000000 {
                        compatible = "st,stm32-dma";
                        reg = <0x48000000 0x400>;
@@ -1444,26 +1412,6 @@
                        status = "disabled";
                };
 
-               gpu: gpu@59000000 {
-                       compatible = "vivante,gc";
-                       reg = <0x59000000 0x800>;
-                       interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&rcc GPU>, <&rcc GPU_K>;
-                       clock-names = "bus" ,"core";
-                       resets = <&rcc GPU_R>;
-                       status = "disabled";
-               };
-
-               dsi: dsi@5a000000 {
-                       compatible = "st,stm32-dsi";
-                       reg = <0x5a000000 0x800>;
-                       clocks = <&rcc DSI_K>, <&clk_hse>, <&rcc DSI_PX>;
-                       clock-names = "pclk", "ref", "px_clk";
-                       resets = <&rcc DSI_R>;
-                       reset-names = "apb";
-                       status = "disabled";
-               };
-
                ltdc: display-controller@5a001000 {
                        compatible = "st,stm32-ltdc";
                        reg = <0x5a001000 0x400>;

diff --git a/arch/arm/boot/dts/stm32mp153.dtsi b/arch/arm/boot/dts/stm32mp153.dtsi
new file mode 100644 (file)
index 0000000..2d759fc
--- /dev/null
+++ b/arch/arm/boot/dts/stm32mp153.dtsi
@@ -0,0 +1,45 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
+/*
+ * Copyright (C) STMicroelectronics 2019 - All Rights Reserved
+ * Author: Alexandre Torgue <alexandre.torgue@st.com> for STMicroelectronics.
+ */
+
+#include "stm32mp151.dtsi"
+
+/ {
+       cpus {
+               cpu1: cpu@1 {
+                       compatible = "arm,cortex-a7";
+                       device_type = "cpu";
+                       reg = <1>;
+               };
+       };
+
+       soc {
+               m_can1: can@4400e000 {
+                       compatible = "bosch,m_can";
+                       reg = <0x4400e000 0x400>, <0x44011000 0x1400>;
+                       reg-names = "m_can", "message_ram";
+                       interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "int0", "int1";
+                       clocks = <&rcc CK_HSE>, <&rcc FDCAN_K>;
+                       clock-names = "hclk", "cclk";
+                       bosch,mram-cfg = <0x0 0 0 32 0 0 2 2>;
+                       status = "disabled";
+               };
+
+               m_can2: can@4400f000 {
+                       compatible = "bosch,m_can";
+                       reg = <0x4400f000 0x400>, <0x44011000 0x2800>;
+                       reg-names = "m_can", "message_ram";
+                       interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "int0", "int1";
+                       clocks = <&rcc CK_HSE>, <&rcc FDCAN_K>;
+                       clock-names = "hclk", "cclk";
+                       bosch,mram-cfg = <0x1400 0 0 32 0 0 2 2>;
+                       status = "disabled";
+               };
+       };
+};

diff --git a/arch/arm/boot/dts/stm32mp157.dtsi b/arch/arm/boot/dts/stm32mp157.dtsi
new file mode 100644 (file)
index 0000000..3f0a4a9
--- /dev/null
+++ b/arch/arm/boot/dts/stm32mp157.dtsi
@@ -0,0 +1,31 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
+/*
+ * Copyright (C) STMicroelectronics 2019 - All Rights Reserved
+ * Author: Alexandre Torgue <alexandre.torgue@st.com> for STMicroelectronics.
+ */
+
+#include "stm32mp153.dtsi"
+
+/ {
+       soc {
+               gpu: gpu@59000000 {
+                       compatible = "vivante,gc";
+                       reg = <0x59000000 0x800>;
+                       interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&rcc GPU>, <&rcc GPU_K>;
+                       clock-names = "bus" ,"core";
+                       resets = <&rcc GPU_R>;
+                       status = "disabled";
+               };
+
+               dsi: dsi@5a000000 {
+                       compatible = "st,stm32-dsi";
+                       reg = <0x5a000000 0x800>;
+                       clocks = <&rcc DSI_K>, <&clk_hse>, <&rcc DSI_PX>;
+                       clock-names = "pclk", "ref", "px_clk";
+                       resets = <&rcc DSI_R>;
+                       reset-names = "apb";
+                       status = "disabled";
+               };
+       };
+};

diff --git a/arch/arm/boot/dts/stm32mp157a-avenger96.dts b/arch/arm/boot/dts/stm32mp157a-avenger96.dts
index 2f6dd51e8506d1333d947c23e00f89e1ca9f34a8..cbfa4075907ee934f94209550018d24cd197201f 100644 (file)
--- a/arch/arm/boot/dts/stm32mp157a-avenger96.dts
+++ b/arch/arm/boot/dts/stm32mp157a-avenger96.dts
@@ -6,7 +6,7 @@
 
 /dts-v1/;
 
-#include "stm32mp157c.dtsi"
+#include "stm32mp157.dtsi"
 #include "stm32mp15-pinctrl.dtsi"
 #include "stm32mp15xxac-pinctrl.dtsi"
 #include <dt-bindings/gpio/gpio.h>

diff --git a/arch/arm/boot/dts/stm32mp157a-dk1.dts b/arch/arm/boot/dts/stm32mp157a-dk1.dts
index 7ee7b4d13d398c2433cfcd8a5ab75c7e4973708e..3f869bd67082e94b2f02c4b27d889851914ffdb0 100644 (file)
--- a/arch/arm/boot/dts/stm32mp157a-dk1.dts
+++ b/arch/arm/boot/dts/stm32mp157a-dk1.dts
@@ -6,7 +6,7 @@
 
 /dts-v1/;
 
-#include "stm32mp157c.dtsi"
+#include "stm32mp157.dtsi"
 #include "stm32mp15-pinctrl.dtsi"
 #include "stm32mp15xxac-pinctrl.dtsi"
 #include <dt-bindings/gpio/gpio.h>

diff --git a/arch/arm/boot/dts/stm32mp157c-ed1.dts b/arch/arm/boot/dts/stm32mp157c-ed1.dts
index e5d8da01aaef6e9190d053ac949a3b944c8984fb..975f69ea4eed91cffe7dd310faf3e2e875f9f565 100644 (file)
--- a/arch/arm/boot/dts/stm32mp157c-ed1.dts
+++ b/arch/arm/boot/dts/stm32mp157c-ed1.dts
@@ -5,7 +5,7 @@
  */
 /dts-v1/;
 
-#include "stm32mp157c.dtsi"
+#include "stm32mp157.dtsi"
 #include "stm32mp15-pinctrl.dtsi"
 #include "stm32mp15xxaa-pinctrl.dtsi"
 #include <dt-bindings/gpio/gpio.h>