arm64: dts: qcom: hamoa: Move PHY, PERST, and Wake GPIOs to PCIe port nodes and add...

Since describing the PCIe PHY directly under the RC node is now
deprecated, move the references to the respective PCIe port nodes,
creating them where necessary.Also add port nodes for PCIe5 and PCIe6a
with proper PHY references.

And also move the PCIe PERST and wake GPIOs from the controller nodes to
the corresponding PCIe port nodes on Hamoa-based platforms:

 - x1e001de-devkit
 - x1e78100-lenovo-thinkpad-t14s
 - x1e80100-asus-vivobook-s15
 - x1e80100-asus-zenbook-a14
 - x1e80100-dell-xps13-9345
 - x1e80100-lenovo-yoga-slim7x
 - x1e80100-microsoft-romulus
 - x1e80100-qcp

Signed-off-by: Ziyue Zhang <ziyue.zhang@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260109104504.3147745-2-ziyue.zhang@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/hamoa.dtsi b/arch/arm64/boot/dts/qcom/hamoa.dtsi
index a559f6340af9d348a92e8cc4c56648c99ca0a58f..f464ff3b89cb15eeed0e88f2be8aab50350041f0 100644 (file)
--- a/arch/arm64/boot/dts/qcom/hamoa.dtsi
+++ b/arch/arm64/boot/dts/qcom/hamoa.dtsi
@@ -3261,9 +3261,6 @@
 
                        power-domains = <&gcc GCC_PCIE_3_GDSC>;
 
-                       phys = <&pcie3_phy>;
-                       phy-names = "pciephy";
-
                        eq-presets-8gts = /bits/ 16 <0x5555 0x5555 0x5555 0x5555
                                                     0x5555 0x5555 0x5555 0x5555>;
                        eq-presets-16gts = /bits/ 8 <0x55 0x55 0x55 0x55 0x55 0x55 0x55 0x55>;
@@ -3404,12 +3401,14 @@
                                };
                        };
 
-                       pcie3_port: pcie@0 {
+                       pcie3_port0: pcie@0 {
                                device_type = "pci";
                                compatible = "pciclass,0604";
                                reg = <0x0 0x0 0x0 0x0 0x0>;
                                bus-range = <0x01 0xff>;
 
+                               phys = <&pcie3_phy>;
+
                                #address-cells = <3>;
                                #size-cells = <2>;
                                ranges;
@@ -3538,13 +3537,22 @@
                        power-domains = <&gcc GCC_PCIE_6A_GDSC>;
                        required-opps = <&rpmhpd_opp_nom>;
 
-                       phys = <&pcie6a_phy>;
-                       phy-names = "pciephy";
-
                        eq-presets-8gts = /bits/ 16 <0x5555 0x5555 0x5555 0x5555>;
                        eq-presets-16gts = /bits/ 8 <0x55 0x55 0x55 0x55>;
 
                        status = "disabled";
+
+                       pcie6a_port0: pcie@0 {
+                               device_type = "pci";
+                               reg = <0x0 0x0 0x0 0x0 0x0>;
+                               bus-range = <0x01 0xff>;
+
+                               phys = <&pcie6a_phy>;
+
+                               #address-cells = <3>;
+                               #size-cells = <2>;
+                               ranges;
+                       };
                };
 
                pcie6a_phy: phy@1bfc000 {
@@ -3670,12 +3678,21 @@
                        power-domains = <&gcc GCC_PCIE_5_GDSC>;
                        required-opps = <&rpmhpd_opp_nom>;
 
-                       phys = <&pcie5_phy>;
-                       phy-names = "pciephy";
-
                        eq-presets-8gts = /bits/ 16 <0x5555 0x5555>;
 
                        status = "disabled";
+
+                       pcie5_port0: pcie@0 {
+                               device_type = "pci";
+                               reg = <0x0 0x0 0x0 0x0 0x0>;
+                               bus-range = <0x01 0xff>;
+
+                               phys = <&pcie5_phy>;
+
+                               #address-cells = <3>;
+                               #size-cells = <2>;
+                               ranges;
+                       };
                };
 
                pcie5_phy: phy@1c06000 {
@@ -3800,9 +3817,6 @@
                        power-domains = <&gcc GCC_PCIE_4_GDSC>;
                        required-opps = <&rpmhpd_opp_nom>;
 
-                       phys = <&pcie4_phy>;
-                       phy-names = "pciephy";
-
                        eq-presets-8gts = /bits/ 16 <0x5555 0x5555>;
 
                        status = "disabled";
@@ -3812,6 +3826,8 @@
                                reg = <0x0 0x0 0x0 0x0 0x0>;
                                bus-range = <0x01 0xff>;
 
+                               phys = <&pcie4_phy>;
+
                                #address-cells = <3>;
                                #size-cells = <2>;
                                ranges;

diff --git a/arch/arm64/boot/dts/qcom/x1e001de-devkit.dts b/arch/arm64/boot/dts/qcom/x1e001de-devkit.dts
index a9643cd746d500296848f4b0f928a2905dcd49c0..d5a60671a38373826c1e82e51b5724f1788f8089 100644 (file)
--- a/arch/arm64/boot/dts/qcom/x1e001de-devkit.dts
+++ b/arch/arm64/boot/dts/qcom/x1e001de-devkit.dts
@@ -1003,9 +1003,6 @@
 };
 
 &pcie4 {
-       perst-gpios = <&tlmm 146 GPIO_ACTIVE_LOW>;
-       wake-gpios = <&tlmm 148 GPIO_ACTIVE_LOW>;
-
        pinctrl-0 = <&pcie4_default>;
        pinctrl-names = "default";
 
@@ -1019,10 +1016,12 @@
        status = "okay";
 };
 
-&pcie5 {
-       perst-gpios = <&tlmm 149 GPIO_ACTIVE_LOW>;
-       wake-gpios = <&tlmm 151 GPIO_ACTIVE_LOW>;
+&pcie4_port0 {
+       reset-gpios = <&tlmm 146 GPIO_ACTIVE_LOW>;
+       wake-gpios = <&tlmm 148 GPIO_ACTIVE_LOW>;
+};
 
+&pcie5 {
        vddpe-3v3-supply = <&vreg_wwan>;
 
        pinctrl-0 = <&pcie5_default>;
@@ -1038,10 +1037,12 @@
        status = "okay";
 };
 
-&pcie6a {
-       perst-gpios = <&tlmm 152 GPIO_ACTIVE_LOW>;
-       wake-gpios = <&tlmm 154 GPIO_ACTIVE_LOW>;
+&pcie5_port0 {
+       reset-gpios = <&tlmm 149 GPIO_ACTIVE_LOW>;
+       wake-gpios = <&tlmm 151 GPIO_ACTIVE_LOW>;
+};
 
+&pcie6a {
        vddpe-3v3-supply = <&vreg_nvme>;
 
        pinctrl-names = "default";
@@ -1057,6 +1058,11 @@
        status = "okay";
 };
 
+&pcie6a_port0 {
+       reset-gpios = <&tlmm 152 GPIO_ACTIVE_LOW>;
+       wake-gpios = <&tlmm 154 GPIO_ACTIVE_LOW>;
+};
+
 &pm8550_gpios {
        rtmr0_default: rtmr0-reset-n-active-state {
                pins = "gpio10";

diff --git a/arch/arm64/boot/dts/qcom/x1e78100-lenovo-thinkpad-t14s.dtsi b/arch/arm64/boot/dts/qcom/x1e78100-lenovo-thinkpad-t14s.dtsi
index 7aee9a20c6dfc3b22e833a7e55d09b3daef76e93..b45e377a22c6248502a6e503b908af5a951c6ad2 100644 (file)
--- a/arch/arm64/boot/dts/qcom/x1e78100-lenovo-thinkpad-t14s.dtsi
+++ b/arch/arm64/boot/dts/qcom/x1e78100-lenovo-thinkpad-t14s.dtsi
@@ -1113,9 +1113,6 @@
 };
 
 &pcie4 {
-       perst-gpios = <&tlmm 146 GPIO_ACTIVE_LOW>;
-       wake-gpios = <&tlmm 148 GPIO_ACTIVE_LOW>;
-
        pinctrl-0 = <&pcie4_default>;
        pinctrl-names = "default";
 
@@ -1129,10 +1126,12 @@
        status = "okay";
 };
 
-&pcie5 {
-       perst-gpios = <&tlmm 149 GPIO_ACTIVE_LOW>;
-       wake-gpios = <&tlmm 151 GPIO_ACTIVE_LOW>;
+&pcie4_port0 {
+       reset-gpios = <&tlmm 146 GPIO_ACTIVE_LOW>;
+       wake-gpios = <&tlmm 148 GPIO_ACTIVE_LOW>;
+};
 
+&pcie5 {
        vddpe-3v3-supply = <&vreg_wwan>;
 
        pinctrl-0 = <&pcie5_default>;
@@ -1148,10 +1147,12 @@
        status = "okay";
 };
 
-&pcie6a {
-       perst-gpios = <&tlmm 152 GPIO_ACTIVE_LOW>;
-       wake-gpios = <&tlmm 154 GPIO_ACTIVE_LOW>;
+&pcie5_port0 {
+       reset-gpios = <&tlmm 149 GPIO_ACTIVE_LOW>;
+       wake-gpios = <&tlmm 151 GPIO_ACTIVE_LOW>;
+};
 
+&pcie6a {
        vddpe-3v3-supply = <&vreg_nvme>;
 
        pinctrl-0 = <&pcie6a_default>;
@@ -1167,6 +1168,11 @@
        status = "okay";
 };
 
+&pcie6a_port0 {
+       reset-gpios = <&tlmm 152 GPIO_ACTIVE_LOW>;
+       wake-gpios = <&tlmm 154 GPIO_ACTIVE_LOW>;
+};
+
 &pm8550_gpios {
        rtmr0_default: rtmr0-reset-n-active-state {
                pins = "gpio10";

diff --git a/arch/arm64/boot/dts/qcom/x1e80100-asus-vivobook-s15.dts b/arch/arm64/boot/dts/qcom/x1e80100-asus-vivobook-s15.dts
index 34467b84a2fa68597ed4ae75d7ecd4eccc18ca33..17269eb0638acb81cef7112285372b5d306ed8c3 100644 (file)
--- a/arch/arm64/boot/dts/qcom/x1e80100-asus-vivobook-s15.dts
+++ b/arch/arm64/boot/dts/qcom/x1e80100-asus-vivobook-s15.dts
@@ -907,9 +907,6 @@
 };
 
 &pcie4 {
-       perst-gpios = <&tlmm 146 GPIO_ACTIVE_LOW>;
-       wake-gpios = <&tlmm 148 GPIO_ACTIVE_LOW>;
-
        pinctrl-0 = <&pcie4_default>;
        pinctrl-names = "default";
 
@@ -924,6 +921,9 @@
 };
 
 &pcie4_port0 {
+       reset-gpios = <&tlmm 146 GPIO_ACTIVE_LOW>;
+       wake-gpios = <&tlmm 148 GPIO_ACTIVE_LOW>;
+
        wifi@0 {
                compatible = "pci17cb,1107";
                reg = <0x10000 0x0 0x0 0x0 0x0>;
@@ -941,9 +941,6 @@
 };
 
 &pcie6a {
-       perst-gpios = <&tlmm 152 GPIO_ACTIVE_LOW>;
-       wake-gpios = <&tlmm 154 GPIO_ACTIVE_LOW>;
-
        vddpe-3v3-supply = <&vreg_nvme>;
 
        pinctrl-0 = <&pcie6a_default>;
@@ -959,6 +956,11 @@
        status = "okay";
 };
 
+&pcie6a_port0 {
+       reset-gpios = <&tlmm 152 GPIO_ACTIVE_LOW>;
+       wake-gpios = <&tlmm 154 GPIO_ACTIVE_LOW>;
+};
+
 &pm8550_gpios {
        rtmr0_default: rtmr0-reset-n-active-state {
                pins = "gpio10";

diff --git a/arch/arm64/boot/dts/qcom/x1e80100-asus-zenbook-a14.dts b/arch/arm64/boot/dts/qcom/x1e80100-asus-zenbook-a14.dts
index 0408ade7150fc879d89a1debccec8512f56bfeff..b42318c75ed285985c91cdbe611631234a00ae9b 100644 (file)
--- a/arch/arm64/boot/dts/qcom/x1e80100-asus-zenbook-a14.dts
+++ b/arch/arm64/boot/dts/qcom/x1e80100-asus-zenbook-a14.dts
@@ -82,6 +82,9 @@
 };
 
 &pcie4_port0 {
+       reset-gpios = <&tlmm 146 GPIO_ACTIVE_LOW>;
+       wake-gpios = <&tlmm 148 GPIO_ACTIVE_LOW>;
+
        wifi@0 {
                compatible = "pci17cb,1107";
                reg = <0x10000 0x0 0x0 0x0 0x0>;

diff --git a/arch/arm64/boot/dts/qcom/x1e80100-dell-xps13-9345.dts b/arch/arm64/boot/dts/qcom/x1e80100-dell-xps13-9345.dts
index 2f533e56c8c84101973f557c4df2abd21af8832a..4c95b1af2c64432967dc1e8b1d1c8bfe5a59cc34 100644 (file)
--- a/arch/arm64/boot/dts/qcom/x1e80100-dell-xps13-9345.dts
+++ b/arch/arm64/boot/dts/qcom/x1e80100-dell-xps13-9345.dts
@@ -941,9 +941,6 @@
 };
 
 &pcie4 {
-       perst-gpios = <&tlmm 146 GPIO_ACTIVE_LOW>;
-       wake-gpios = <&tlmm 148 GPIO_ACTIVE_LOW>;
-
        pinctrl-0 = <&pcie4_default>;
        pinctrl-names = "default";
 
@@ -958,6 +955,9 @@
 };
 
 &pcie4_port0 {
+       reset-gpios = <&tlmm 146 GPIO_ACTIVE_LOW>;
+       wake-gpios = <&tlmm 148 GPIO_ACTIVE_LOW>;
+
        wifi@0 {
                compatible = "pci17cb,1107";
                reg = <0x10000 0x0 0x0 0x0 0x0>;
@@ -975,9 +975,6 @@
 };
 
 &pcie6a {
-       perst-gpios = <&tlmm 152 GPIO_ACTIVE_LOW>;
-       wake-gpios = <&tlmm 154 GPIO_ACTIVE_LOW>;
-
        vddpe-3v3-supply = <&vreg_nvme>;
 
        pinctrl-0 = <&pcie6a_default>;
@@ -993,6 +990,11 @@
        status = "okay";
 };
 
+&pcie6a_port0 {
+       reset-gpios = <&tlmm 152 GPIO_ACTIVE_LOW>;
+       wake-gpios = <&tlmm 154 GPIO_ACTIVE_LOW>;
+};
+
 &pm8550_gpios {
        rtmr0_default: rtmr0-reset-n-active-state {
                pins = "gpio10";

diff --git a/arch/arm64/boot/dts/qcom/x1e80100-lenovo-yoga-slim7x.dts b/arch/arm64/boot/dts/qcom/x1e80100-lenovo-yoga-slim7x.dts
index 4c31d14a07bc67055b836725d4738bd31d611db1..d6472e5a3f9fa74d4ca21e2d3053b3e7ff4f31ff 100644 (file)
--- a/arch/arm64/boot/dts/qcom/x1e80100-lenovo-yoga-slim7x.dts
+++ b/arch/arm64/boot/dts/qcom/x1e80100-lenovo-yoga-slim7x.dts
@@ -1160,9 +1160,6 @@
 };
 
 &pcie6a {
-       perst-gpios = <&tlmm 152 GPIO_ACTIVE_LOW>;
-       wake-gpios = <&tlmm 154 GPIO_ACTIVE_LOW>;
-
        vddpe-3v3-supply = <&vreg_nvme>;
 
        pinctrl-0 = <&pcie6a_default>;
@@ -1178,6 +1175,11 @@
        status = "okay";
 };
 
+&pcie6a_port0 {
+       reset-gpios = <&tlmm 152 GPIO_ACTIVE_LOW>;
+       wake-gpios = <&tlmm 154 GPIO_ACTIVE_LOW>;
+};
+
 &pm8550_gpios {
        rtmr0_default: rtmr0-reset-n-active-state {
                pins = "gpio10";

diff --git a/arch/arm64/boot/dts/qcom/x1e80100-microsoft-romulus.dtsi b/arch/arm64/boot/dts/qcom/x1e80100-microsoft-romulus.dtsi
index 7e1e808ea983b6571bde306f575a94c4d6fcff84..37539a09b76eaa78bbe38c8332bf3648f380c3c2 100644 (file)
--- a/arch/arm64/boot/dts/qcom/x1e80100-microsoft-romulus.dtsi
+++ b/arch/arm64/boot/dts/qcom/x1e80100-microsoft-romulus.dtsi
@@ -1094,9 +1094,6 @@
 };
 
 &pcie3 {
-       perst-gpios = <&tlmm 143 GPIO_ACTIVE_LOW>;
-       wake-gpios = <&tlmm 145 GPIO_ACTIVE_HIGH>;
-
        pinctrl-0 = <&pcie3_default>;
        pinctrl-names = "default";
 
@@ -1112,6 +1109,11 @@
        status = "okay";
 };
 
+&pcie3_port0 {
+       reset-gpios = <&tlmm 143 GPIO_ACTIVE_LOW>;
+       wake-gpios = <&tlmm 145 GPIO_ACTIVE_LOW>;
+};
+
 &pcie4 {
        status = "okay";
 };
@@ -1124,6 +1126,9 @@
 };
 
 &pcie4_port0 {
+       reset-gpios = <&tlmm 146 GPIO_ACTIVE_LOW>;
+       wake-gpios = <&tlmm 148 GPIO_ACTIVE_LOW>;
+
        wifi@0 {
                compatible = "pci17cb,1107";
                reg = <0x10000 0x0 0x0 0x0 0x0>;
@@ -1141,9 +1146,6 @@
 };
 
 &pcie6a {
-       perst-gpios = <&tlmm 152 GPIO_ACTIVE_LOW>;
-       wake-gpios = <&tlmm 154 GPIO_ACTIVE_LOW>;
-
        vddpe-3v3-supply = <&vreg_nvme>;
 
        pinctrl-0 = <&pcie6a_default>;
@@ -1159,6 +1161,11 @@
        status = "okay";
 };
 
+&pcie6a_port0 {
+       reset-gpios = <&tlmm 152 GPIO_ACTIVE_LOW>;
+       wake-gpios = <&tlmm 154 GPIO_ACTIVE_LOW>;
+};
+
 &pm8550_gpios {
        rtmr0_default: rtmr0-reset-n-active-state {
                pins = "gpio10";

diff --git a/arch/arm64/boot/dts/qcom/x1e80100-qcp.dts b/arch/arm64/boot/dts/qcom/x1e80100-qcp.dts
index b742aabd9c049eb0f24cf96fb1af879acfc5d3b6..1d402ef865124c412d3caab1b8e0027647fa7b0a 100644 (file)
--- a/arch/arm64/boot/dts/qcom/x1e80100-qcp.dts
+++ b/arch/arm64/boot/dts/qcom/x1e80100-qcp.dts
@@ -979,8 +979,6 @@
 &pcie3 {
        pinctrl-names = "default";
        pinctrl-0 = <&pcie3_default>;
-       perst-gpios = <&tlmm 143 GPIO_ACTIVE_LOW>;
-       wake-gpios = <&tlmm 145 GPIO_ACTIVE_LOW>;
 
        status = "okay";
 };
@@ -992,16 +990,16 @@
        status = "okay";
 };
 
-&pcie3_port {
+&pcie3_port0 {
        vpcie12v-supply = <&vreg_pcie_12v>;
        vpcie3v3-supply = <&vreg_pcie_3v3>;
        vpcie3v3aux-supply = <&vreg_pcie_3v3_aux>;
+
+       reset-gpios = <&tlmm 143 GPIO_ACTIVE_LOW>;
+       wake-gpios = <&tlmm 145 GPIO_ACTIVE_LOW>;
 };
 
 &pcie4 {
-       perst-gpios = <&tlmm 146 GPIO_ACTIVE_LOW>;
-       wake-gpios = <&tlmm 148 GPIO_ACTIVE_LOW>;
-
        pinctrl-0 = <&pcie4_default>;
        pinctrl-names = "default";
 
@@ -1016,6 +1014,9 @@
 };
 
 &pcie4_port0 {
+       reset-gpios = <&tlmm 146 GPIO_ACTIVE_LOW>;
+       wake-gpios = <&tlmm 148 GPIO_ACTIVE_LOW>;
+
        wifi@0 {
                compatible = "pci17cb,1107";
                reg = <0x10000 0x0 0x0 0x0 0x0>;
@@ -1033,9 +1034,6 @@
 };
 
 &pcie6a {
-       perst-gpios = <&tlmm 152 GPIO_ACTIVE_LOW>;
-       wake-gpios = <&tlmm 154 GPIO_ACTIVE_LOW>;
-
        vddpe-3v3-supply = <&vreg_nvme>;
 
        pinctrl-names = "default";
@@ -1051,6 +1049,11 @@
        status = "okay";
 };
 
+&pcie6a_port0 {
+       reset-gpios = <&tlmm 152 GPIO_ACTIVE_LOW>;
+       wake-gpios = <&tlmm 154 GPIO_ACTIVE_LOW>;
+};
+
 &qupv3_0 {
        status = "okay";
 };