]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
arm64: dts: renesas: r9a07g044: Fix SCI{Rx,Tx} interrupt types
authorBiju Das <biju.das.jz@bp.renesas.com>
Tue, 2 Aug 2022 10:15:32 +0000 (11:15 +0100)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Mon, 24 Oct 2022 07:57:24 +0000 (09:57 +0200)
[ Upstream commit f3b7bc89c97b98aa6f157d5f296695af8940a5ac ]

As per the latest RZ/G2L Hardware User's Manual (Rev.1.10 Apr, 2022),
the interrupt type of SCI{Rx,Tx} is edge triggered.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Fixes: f9a2adcc9e908907 ("arm64: dts: renesas: r9a07g044: Add SCI[0-1] nodes")
Link: https://lore.kernel.org/r/20220802101534.1401342-1-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Sasha Levin <sashal@kernel.org>
arch/arm64/boot/dts/renesas/r9a07g044.dtsi

index 3652e511160fb5a758de96a939081227db337877..265140b20dadd5af172d9397c81f9dc9a51456d0 100644 (file)
                        compatible = "renesas,r9a07g044-sci", "renesas,sci";
                        reg = <0 0x1004d000 0 0x400>;
                        interrupts = <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>,
-                                    <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>,
-                                    <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 406 IRQ_TYPE_EDGE_RISING>,
+                                    <GIC_SPI 407 IRQ_TYPE_EDGE_RISING>,
                                     <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>;
                        interrupt-names = "eri", "rxi", "txi", "tei";
                        clocks = <&cpg CPG_MOD R9A07G044_SCI0_CLKP>;
                        compatible = "renesas,r9a07g044-sci", "renesas,sci";
                        reg = <0 0x1004d400 0 0x400>;
                        interrupts = <GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH>,
-                                    <GIC_SPI 410 IRQ_TYPE_LEVEL_HIGH>,
-                                    <GIC_SPI 411 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 410 IRQ_TYPE_EDGE_RISING>,
+                                    <GIC_SPI 411 IRQ_TYPE_EDGE_RISING>,
                                     <GIC_SPI 412 IRQ_TYPE_LEVEL_HIGH>;
                        interrupt-names = "eri", "rxi", "txi", "tei";
                        clocks = <&cpg CPG_MOD R9A07G044_SCI1_CLKP>;