* fix return codes of nvram_getenv. Now it behaves like cfe_getenv.
* also check cfe for kernel_args param.
* some style fixes
SVN-Revision: 22424
-From bf93090747e3d23e5354bd8da52f85d96c0f6606 Mon Sep 17 00:00:00 2001
+From f65eb52ea6c0ec939fd44e74b6b873e0b549e3c9 Mon Sep 17 00:00:00 2001
From: Hauke Mehrtens <hauke@hauke-m.de>
Date: Sun, 18 Jul 2010 12:49:41 +0200
-Subject: [PATCH 1/5] MIPS: BCM47xx: Really fix 128MB RAM problem
+Subject: [PATCH 1/6] MIPS: BCM47xx: Really fix 128MB RAM problem
The previews patch 84a6fcb368a080620d12fc4d79e07902dbee7335 was wrong,
I got wrong success reports.
-From fbdfca0b2489ad94c6a3bc90b47adfd5c8179a89 Mon Sep 17 00:00:00 2001
+From e5c5828063a55a752e2392d820383dd7a5da3737 Mon Sep 17 00:00:00 2001
From: Hauke Mehrtens <hauke@hauke-m.de>
Date: Sun, 18 Jul 2010 13:34:32 +0200
-Subject: [PATCH 2/5] MIPS: BCM47xx: Fill values for b43 into ssb sprom
+Subject: [PATCH 2/6] MIPS: BCM47xx: Fill values for b43 into ssb sprom
Most of the values are stored in the nvram and not in the CFE. At first
the nvram should be read and if there is no value it should look into
the CFE. Now more values are read out because the b43 and b43legacy
drivers needs them.
+Some parts of this patch have been in OpenWRT for a long time and were
+made by Michael Buesch.
+
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
---
arch/mips/bcm47xx/setup.c | 131 +++++++++++++++++++++++++++++++++-----------
-From e6feb5dc2c1bb28582fa3e1445f9d90114e39724 Mon Sep 17 00:00:00 2001
+From e0039e622e53a22b14fce4d2f0cb3febc75cd58b Mon Sep 17 00:00:00 2001
From: Hauke Mehrtens <hauke@hauke-m.de>
Date: Sun, 18 Jul 2010 13:58:09 +0200
-Subject: [PATCH 3/5] MIPS: BCM47xx: Activate SSB_B43_PCI_BRIDGE by default
+Subject: [PATCH 3/6] MIPS: BCM47xx: Activate SSB_B43_PCI_BRIDGE by default
The b43_pci_bridge is needed to use the b43 driver with brcm47xx.
Activate it by default if pci is available.
-From a41121d789e236fd637ab49beb5ce7b48763613a Mon Sep 17 00:00:00 2001
+From 9be402f069cc259ad5795b77567d66c4e7f6bef6 Mon Sep 17 00:00:00 2001
From: Hauke Mehrtens <hauke@hauke-m.de>
Date: Sun, 18 Jul 2010 14:59:24 +0200
-Subject: [PATCH 4/5] MIPS: BCM47xx: Setup and register serial early
+Subject: [PATCH 4/6] MIPS: BCM47xx: Setup and register serial early
Swap the first and second serial if console=ttyS1 was set.
Set it up and register it for early serial support.
+This patch has been in OpenWRT for a long time.
+
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
---
- arch/mips/Kconfig | 1 -
- arch/mips/bcm47xx/setup.c | 37 ++++++++++++++++++++++++++++++++++++-
- 2 files changed, 36 insertions(+), 2 deletions(-)
+ arch/mips/bcm47xx/setup.c | 39 ++++++++++++++++++++++++++++++++++++++-
+ 1 files changed, 38 insertions(+), 1 deletions(-)
---- a/arch/mips/Kconfig
-+++ b/arch/mips/Kconfig
-@@ -65,7 +65,6 @@ config BCM47XX
- select SSB_B43_PCI_BRIDGE if PCI
- select SSB_PCICORE_HOSTMODE if PCI
- select GENERIC_GPIO
-- select SYS_HAS_EARLY_PRINTK
- select CFE
- help
- Support for BCM47XX based boards
--- a/arch/mips/bcm47xx/setup.c
+++ b/arch/mips/bcm47xx/setup.c
@@ -28,6 +28,8 @@
#include <asm/bootinfo.h>
#include <asm/reboot.h>
#include <asm/time.h>
-@@ -190,12 +192,45 @@ static int bcm47xx_get_invariants(struct
+@@ -190,12 +192,47 @@ static int bcm47xx_get_invariants(struct
void __init plat_mem_setup(void)
{
panic("Failed to initialize SSB bus (err %d)\n", err);
+ mcore = &ssb_bcm47xx.mipscore;
+
-+ nvram_getenv("kernel_args", buf, sizeof(buf));
-+ if (!strncmp(buf, "console=ttyS1", 13)) {
-+ struct ssb_serial_port port;
++ if (nvram_getenv("kernel_args", buf, sizeof(buf)) >= 0 ||
++ cfe_getenv("kernel_args", buf, sizeof(buf)) >= 0) {
++ if (strstr(buf, "console=ttyS1")) {
++ struct ssb_serial_port port;
+
-+ printk(KERN_DEBUG "Swapping serial ports!\n");
-+ /* swap serial ports */
-+ memcpy(&port, &mcore->serial_ports[0], sizeof(port));
-+ memcpy(&mcore->serial_ports[0], &mcore->serial_ports[1],
-+ sizeof(port));
-+ memcpy(&mcore->serial_ports[1], &port, sizeof(port));
++ printk(KERN_DEBUG "Swapping serial ports!\n");
++ /* swap serial ports */
++ memcpy(&port, &mcore->serial_ports[0], sizeof(port));
++ memcpy(&mcore->serial_ports[0], &mcore->serial_ports[1],
++ sizeof(port));
++ memcpy(&mcore->serial_ports[1], &port, sizeof(port));
++ }
+ }
+
+ for (i = 0; i < mcore->nr_serial_ports; i++) {
--- /dev/null
+From c5cb2459ff124c1a928e2056bc1fe2da7b6ab6ba Mon Sep 17 00:00:00 2001
+From: Hauke Mehrtens <hauke@hauke-m.de>
+Date: Fri, 30 Jul 2010 17:45:20 +0200
+Subject: [PATCH 5/6] MIPS: BCM47xx: nvram_getenv fix return value.
+
+nvram_getenv should behave like cfe_getenv. For now it is used like
+cfe_getenv. cfe_getenv returns 0 on success and -1 in case of an error.
+Change nvram_getenv to do the same.
+
+Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
+---
+ arch/mips/bcm47xx/nvram.c | 4 ++--
+ 1 files changed, 2 insertions(+), 2 deletions(-)
+
+--- a/arch/mips/bcm47xx/nvram.c
++++ b/arch/mips/bcm47xx/nvram.c
+@@ -69,7 +69,7 @@ int nvram_getenv(char *name, char *val,
+ char *var, *value, *end, *eq;
+
+ if (!name)
+- return 1;
++ return -8;
+
+ if (!nvram_buf[0])
+ early_nvram_init();
+@@ -89,6 +89,6 @@ int nvram_getenv(char *name, char *val,
+ return 0;
+ }
+ }
+- return 1;
++ return -9;
+ }
+ EXPORT_SYMBOL(nvram_getenv);
-From 83b4ed2d1789609565822335ea27026d46fbb477 Mon Sep 17 00:00:00 2001
+From 5219981646071abb6731634bf47781a53e248764 Mon Sep 17 00:00:00 2001
From: Hauke Mehrtens <hauke@hauke-m.de>
Date: Sun, 18 Jul 2010 15:11:26 +0200
-Subject: [PATCH 5/5] MIPS: BCM47xx: Remove CFE console
+Subject: [PATCH 6/6] MIPS: BCM47xx: Remove CFE console
Do not use the CFE console. It causes hangs on some devices like the
Buffalo WHR-HP-G54.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
---
+ arch/mips/Kconfig | 1 -
arch/mips/bcm47xx/prom.c | 82 +++------------------------------------------
- 1 files changed, 6 insertions(+), 76 deletions(-)
+ 2 files changed, 6 insertions(+), 77 deletions(-)
+--- a/arch/mips/Kconfig
++++ b/arch/mips/Kconfig
+@@ -65,7 +65,6 @@ config BCM47XX
+ select SSB_B43_PCI_BRIDGE if PCI
+ select SSB_PCICORE_HOSTMODE if PCI
+ select GENERIC_GPIO
+- select SYS_HAS_EARLY_PRINTK
+ select CFE
+ help
+ Support for BCM47XX based boards
--- a/arch/mips/bcm47xx/prom.c
+++ b/arch/mips/bcm47xx/prom.c
@@ -31,96 +31,28 @@
-From cb33ffbdd8491c58b35958ec74c39b3a5c7fabe8 Mon Sep 17 00:00:00 2001
+From ca00adabb88dd1194891624836d7574aab2d7c05 Mon Sep 17 00:00:00 2001
From: Hauke Mehrtens <hauke@hauke-m.de>
Date: Sun, 18 Jul 2010 21:25:03 +0200
Subject: [PATCH 1/2] USB: Add USB 2.0 to ssb ohci driver
This adds USB 2.0 support to ssb ohci driver.
-This work was done based on Braodcom source code in the OpenWRT project.
+This patch was used in OpenWRT for a long time now.
+CC: Steve Brown <sbrown@cortland.com>
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
---
- drivers/usb/host/ohci-ssb.c | 55 ++++++++++++++++++++++++++++++++++++++++--
- 1 files changed, 52 insertions(+), 3 deletions(-)
+ drivers/usb/host/ohci-ssb.c | 52 ++++++++++++++++++++++++++++++++++++++++--
+ 1 files changed, 49 insertions(+), 3 deletions(-)
--- a/drivers/usb/host/ohci-ssb.c
+++ b/drivers/usb/host/ohci-ssb.c
-@@ -92,9 +92,12 @@ static const struct hc_driver ssb_ohci_h
- static void ssb_ohci_detach(struct ssb_device *dev)
+@@ -93,8 +93,11 @@ static void ssb_ohci_detach(struct ssb_d
{
struct usb_hcd *hcd = ssb_get_drvdata(dev);
+
+ if (hcd->driver->shutdown)
+ hcd->driver->shutdown(hcd);
-
usb_remove_hcd(hcd);
iounmap(hcd->regs);
+ release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
usb_put_hcd(hcd);
ssb_device_disable(dev, 0);
}
-@@ -106,10 +109,55 @@ static int ssb_ohci_attach(struct ssb_de
+@@ -106,10 +109,52 @@ static int ssb_ohci_attach(struct ssb_de
int err = -ENOMEM;
u32 tmp, flags = 0;
+ /*
+ * USB 2.0 special considerations:
+ *
-+ * 1. Since the core supports both ehci and EHCI functions, it must
-+ * only be reset once.
-+ *
-+ * 2. In addition to the standard SSB reset sequence, the Host Control
-+ * Register must be programmed to bring the USB core and various
-+ * phy components out of reset.
++ * In addition to the standard SSB reset sequence, the Host
++ * Control Register must be programmed to bring the USB core
++ * and various phy components out of reset.
+ */
+ ssb_device_enable(dev, 0);
+ ssb_write32(dev, 0x200, 0x7ff);
+ udelay(1);
+
+ /* Work around for 5354 failures */
-+ if ((dev->id.revision == 2) && (dev->bus->chip_id == 0x5354)) {
++ if (dev->id.revision == 2 && dev->bus->chip_id == 0x5354) {
+ /* Change syn01 reg */
+ tmp = 0x00fe00fe;
+ ssb_write32(dev, 0x894, tmp);
hcd = usb_create_hcd(&ssb_ohci_hc_driver, dev->dev,
dev_name(dev->dev));
-@@ -200,6 +248,7 @@ static int ssb_ohci_resume(struct ssb_de
+@@ -200,6 +245,7 @@ static int ssb_ohci_resume(struct ssb_de
static const struct ssb_device_id ssb_ohci_table[] = {
SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_USB11_HOSTDEV, SSB_ANY_REV),
SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_USB11_HOST, SSB_ANY_REV),
-From cb269cf1f97c316a5184080814a751687c72b718 Mon Sep 17 00:00:00 2001
+From ad224c0d5fa0fc05f8aaef3c19fc9b4eb275a5d2 Mon Sep 17 00:00:00 2001
From: Hauke Mehrtens <hauke@hauke-m.de>
Date: Sun, 18 Jul 2010 21:29:40 +0200
Subject: [PATCH 2/2] USB: Add ehci ssb driver
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
---
drivers/usb/host/Kconfig | 13 ++
- drivers/usb/host/ehci-hcd.c | 23 ++++-
- drivers/usb/host/ehci-ssb.c | 258 +++++++++++++++++++++++++++++++++++++++++++
- 3 files changed, 292 insertions(+), 2 deletions(-)
+ drivers/usb/host/ehci-hcd.c | 22 ++++-
+ drivers/usb/host/ehci-ssb.c | 255 +++++++++++++++++++++++++++++++++++++++++++
+ 3 files changed, 288 insertions(+), 2 deletions(-)
create mode 100644 drivers/usb/host/ehci-ssb.c
--- a/drivers/usb/host/Kconfig
clean3:
#endif
#ifdef PS3_SYSTEM_BUS_DRIVER
-@@ -1256,6 +1272,9 @@ static void __exit ehci_hcd_cleanup(void
- #ifdef PS3_SYSTEM_BUS_DRIVER
- ps3_ehci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
- #endif
+@@ -1244,6 +1260,9 @@ module_init(ehci_hcd_init);
+
+ static void __exit ehci_hcd_cleanup(void)
+ {
+#ifdef SSB_EHCI_DRIVER
+ ssb_driver_unregister(&SSB_EHCI_DRIVER);
+#endif
- #ifdef DEBUG
- debugfs_remove(ehci_debug_root);
+ #ifdef OF_PLATFORM_DRIVER
+ of_unregister_platform_driver(&OF_PLATFORM_DRIVER);
#endif
--- /dev/null
+++ b/drivers/usb/host/ehci-ssb.c
-@@ -0,0 +1,258 @@
+@@ -0,0 +1,255 @@
+/*
+ * Sonics Silicon Backplane
+ * Broadcom USB-core EHCI driver (SSB bus glue)
+static void ssb_ehci_detach(struct ssb_device *dev)
+{
+ struct usb_hcd *hcd = ssb_get_drvdata(dev);
++
+ if (hcd->driver->shutdown)
+ hcd->driver->shutdown(hcd);
-+
+ usb_remove_hcd(hcd);
+ iounmap(hcd->regs);
+ release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
+ /*
+ * USB 2.0 special considerations:
+ *
-+ * 1. Since the core supports both ehci and EHCI functions, it must
-+ * only be reset once.
-+ *
-+ * 2. In addition to the standard SSB reset sequence, the Host Control
-+ * Register must be programmed to bring the USB core and various
-+ * phy components out of reset.
++ * In addition to the standard SSB reset sequence, the Host Control
++ * Register must be programmed to bring the USB core and various phy
++ * components out of reset.
+ */
+ ssb_device_enable(dev, 0);
+ ssb_write32(dev, 0x200, 0x7ff);
+ udelay(1);
+
+ /* Work around for 5354 failures */
-+ if ((dev->id.revision == 2) && (dev->bus->chip_id == 0x5354)) {
++ if (dev->id.revision == 2 && dev->bus->chip_id == 0x5354) {
+ /* Change syn01 reg */
+ tmp = 0x00fe00fe;
+ ssb_write32(dev, 0x894, tmp);
-From bf93090747e3d23e5354bd8da52f85d96c0f6606 Mon Sep 17 00:00:00 2001
+From f65eb52ea6c0ec939fd44e74b6b873e0b549e3c9 Mon Sep 17 00:00:00 2001
From: Hauke Mehrtens <hauke@hauke-m.de>
Date: Sun, 18 Jul 2010 12:49:41 +0200
-Subject: [PATCH 1/5] MIPS: BCM47xx: Really fix 128MB RAM problem
+Subject: [PATCH 1/6] MIPS: BCM47xx: Really fix 128MB RAM problem
The previews patch 84a6fcb368a080620d12fc4d79e07902dbee7335 was wrong,
I got wrong success reports.
-From fbdfca0b2489ad94c6a3bc90b47adfd5c8179a89 Mon Sep 17 00:00:00 2001
+From e5c5828063a55a752e2392d820383dd7a5da3737 Mon Sep 17 00:00:00 2001
From: Hauke Mehrtens <hauke@hauke-m.de>
Date: Sun, 18 Jul 2010 13:34:32 +0200
-Subject: [PATCH 2/5] MIPS: BCM47xx: Fill values for b43 into ssb sprom
+Subject: [PATCH 2/6] MIPS: BCM47xx: Fill values for b43 into ssb sprom
Most of the values are stored in the nvram and not in the CFE. At first
the nvram should be read and if there is no value it should look into
the CFE. Now more values are read out because the b43 and b43legacy
drivers needs them.
+Some parts of this patch have been in OpenWRT for a long time and were
+made by Michael Buesch.
+
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
---
arch/mips/bcm47xx/setup.c | 131 +++++++++++++++++++++++++++++++++-----------
-From e6feb5dc2c1bb28582fa3e1445f9d90114e39724 Mon Sep 17 00:00:00 2001
+From e0039e622e53a22b14fce4d2f0cb3febc75cd58b Mon Sep 17 00:00:00 2001
From: Hauke Mehrtens <hauke@hauke-m.de>
Date: Sun, 18 Jul 2010 13:58:09 +0200
-Subject: [PATCH 3/5] MIPS: BCM47xx: Activate SSB_B43_PCI_BRIDGE by default
+Subject: [PATCH 3/6] MIPS: BCM47xx: Activate SSB_B43_PCI_BRIDGE by default
The b43_pci_bridge is needed to use the b43 driver with brcm47xx.
Activate it by default if pci is available.
-From a41121d789e236fd637ab49beb5ce7b48763613a Mon Sep 17 00:00:00 2001
+From 9be402f069cc259ad5795b77567d66c4e7f6bef6 Mon Sep 17 00:00:00 2001
From: Hauke Mehrtens <hauke@hauke-m.de>
Date: Sun, 18 Jul 2010 14:59:24 +0200
-Subject: [PATCH 4/5] MIPS: BCM47xx: Setup and register serial early
+Subject: [PATCH 4/6] MIPS: BCM47xx: Setup and register serial early
Swap the first and second serial if console=ttyS1 was set.
Set it up and register it for early serial support.
+This patch has been in OpenWRT for a long time.
+
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
---
- arch/mips/Kconfig | 1 -
- arch/mips/bcm47xx/setup.c | 37 ++++++++++++++++++++++++++++++++++++-
- 2 files changed, 36 insertions(+), 2 deletions(-)
+ arch/mips/bcm47xx/setup.c | 39 ++++++++++++++++++++++++++++++++++++++-
+ 1 files changed, 38 insertions(+), 1 deletions(-)
---- a/arch/mips/Kconfig
-+++ b/arch/mips/Kconfig
-@@ -65,7 +65,6 @@ config BCM47XX
- select SSB_B43_PCI_BRIDGE if PCI
- select SSB_PCICORE_HOSTMODE if PCI
- select GENERIC_GPIO
-- select SYS_HAS_EARLY_PRINTK
- select CFE
- help
- Support for BCM47XX based boards
--- a/arch/mips/bcm47xx/setup.c
+++ b/arch/mips/bcm47xx/setup.c
@@ -28,6 +28,8 @@
#include <asm/bootinfo.h>
#include <asm/reboot.h>
#include <asm/time.h>
-@@ -190,12 +192,45 @@ static int bcm47xx_get_invariants(struct
+@@ -190,12 +192,47 @@ static int bcm47xx_get_invariants(struct
void __init plat_mem_setup(void)
{
panic("Failed to initialize SSB bus (err %d)\n", err);
+ mcore = &ssb_bcm47xx.mipscore;
+
-+ nvram_getenv("kernel_args", buf, sizeof(buf));
-+ if (!strncmp(buf, "console=ttyS1", 13)) {
-+ struct ssb_serial_port port;
++ if (nvram_getenv("kernel_args", buf, sizeof(buf)) >= 0 ||
++ cfe_getenv("kernel_args", buf, sizeof(buf)) >= 0) {
++ if (strstr(buf, "console=ttyS1")) {
++ struct ssb_serial_port port;
+
-+ printk(KERN_DEBUG "Swapping serial ports!\n");
-+ /* swap serial ports */
-+ memcpy(&port, &mcore->serial_ports[0], sizeof(port));
-+ memcpy(&mcore->serial_ports[0], &mcore->serial_ports[1],
-+ sizeof(port));
-+ memcpy(&mcore->serial_ports[1], &port, sizeof(port));
++ printk(KERN_DEBUG "Swapping serial ports!\n");
++ /* swap serial ports */
++ memcpy(&port, &mcore->serial_ports[0], sizeof(port));
++ memcpy(&mcore->serial_ports[0], &mcore->serial_ports[1],
++ sizeof(port));
++ memcpy(&mcore->serial_ports[1], &port, sizeof(port));
++ }
+ }
+
+ for (i = 0; i < mcore->nr_serial_ports; i++) {
--- /dev/null
+From c5cb2459ff124c1a928e2056bc1fe2da7b6ab6ba Mon Sep 17 00:00:00 2001
+From: Hauke Mehrtens <hauke@hauke-m.de>
+Date: Fri, 30 Jul 2010 17:45:20 +0200
+Subject: [PATCH 5/6] MIPS: BCM47xx: nvram_getenv fix return value.
+
+nvram_getenv should behave like cfe_getenv. For now it is used like
+cfe_getenv. cfe_getenv returns 0 on success and -1 in case of an error.
+Change nvram_getenv to do the same.
+
+Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
+---
+ arch/mips/bcm47xx/nvram.c | 4 ++--
+ 1 files changed, 2 insertions(+), 2 deletions(-)
+
+--- a/arch/mips/bcm47xx/nvram.c
++++ b/arch/mips/bcm47xx/nvram.c
+@@ -69,7 +69,7 @@ int nvram_getenv(char *name, char *val,
+ char *var, *value, *end, *eq;
+
+ if (!name)
+- return 1;
++ return -8;
+
+ if (!nvram_buf[0])
+ early_nvram_init();
+@@ -89,6 +89,6 @@ int nvram_getenv(char *name, char *val,
+ return 0;
+ }
+ }
+- return 1;
++ return -9;
+ }
+ EXPORT_SYMBOL(nvram_getenv);
-From 83b4ed2d1789609565822335ea27026d46fbb477 Mon Sep 17 00:00:00 2001
+From 5219981646071abb6731634bf47781a53e248764 Mon Sep 17 00:00:00 2001
From: Hauke Mehrtens <hauke@hauke-m.de>
Date: Sun, 18 Jul 2010 15:11:26 +0200
-Subject: [PATCH 5/5] MIPS: BCM47xx: Remove CFE console
+Subject: [PATCH 6/6] MIPS: BCM47xx: Remove CFE console
Do not use the CFE console. It causes hangs on some devices like the
Buffalo WHR-HP-G54.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
---
+ arch/mips/Kconfig | 1 -
arch/mips/bcm47xx/prom.c | 82 +++------------------------------------------
- 1 files changed, 6 insertions(+), 76 deletions(-)
+ 2 files changed, 6 insertions(+), 77 deletions(-)
+--- a/arch/mips/Kconfig
++++ b/arch/mips/Kconfig
+@@ -65,7 +65,6 @@ config BCM47XX
+ select SSB_B43_PCI_BRIDGE if PCI
+ select SSB_PCICORE_HOSTMODE if PCI
+ select GENERIC_GPIO
+- select SYS_HAS_EARLY_PRINTK
+ select CFE
+ help
+ Support for BCM47XX based boards
--- a/arch/mips/bcm47xx/prom.c
+++ b/arch/mips/bcm47xx/prom.c
@@ -31,96 +31,28 @@
-From cb33ffbdd8491c58b35958ec74c39b3a5c7fabe8 Mon Sep 17 00:00:00 2001
+From ca00adabb88dd1194891624836d7574aab2d7c05 Mon Sep 17 00:00:00 2001
From: Hauke Mehrtens <hauke@hauke-m.de>
Date: Sun, 18 Jul 2010 21:25:03 +0200
Subject: [PATCH 1/2] USB: Add USB 2.0 to ssb ohci driver
This adds USB 2.0 support to ssb ohci driver.
-This work was done based on Braodcom source code in the OpenWRT project.
+This patch was used in OpenWRT for a long time now.
+CC: Steve Brown <sbrown@cortland.com>
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
---
- drivers/usb/host/ohci-ssb.c | 55 ++++++++++++++++++++++++++++++++++++++++--
- 1 files changed, 52 insertions(+), 3 deletions(-)
+ drivers/usb/host/ohci-ssb.c | 52 ++++++++++++++++++++++++++++++++++++++++--
+ 1 files changed, 49 insertions(+), 3 deletions(-)
--- a/drivers/usb/host/ohci-ssb.c
+++ b/drivers/usb/host/ohci-ssb.c
-@@ -92,9 +92,12 @@ static const struct hc_driver ssb_ohci_h
- static void ssb_ohci_detach(struct ssb_device *dev)
+@@ -93,8 +93,11 @@ static void ssb_ohci_detach(struct ssb_d
{
struct usb_hcd *hcd = ssb_get_drvdata(dev);
+
+ if (hcd->driver->shutdown)
+ hcd->driver->shutdown(hcd);
-
usb_remove_hcd(hcd);
iounmap(hcd->regs);
+ release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
usb_put_hcd(hcd);
ssb_device_disable(dev, 0);
}
-@@ -106,10 +109,55 @@ static int ssb_ohci_attach(struct ssb_de
+@@ -106,10 +109,52 @@ static int ssb_ohci_attach(struct ssb_de
int err = -ENOMEM;
u32 tmp, flags = 0;
+ /*
+ * USB 2.0 special considerations:
+ *
-+ * 1. Since the core supports both ehci and EHCI functions, it must
-+ * only be reset once.
-+ *
-+ * 2. In addition to the standard SSB reset sequence, the Host Control
-+ * Register must be programmed to bring the USB core and various
-+ * phy components out of reset.
++ * In addition to the standard SSB reset sequence, the Host
++ * Control Register must be programmed to bring the USB core
++ * and various phy components out of reset.
+ */
+ ssb_device_enable(dev, 0);
+ ssb_write32(dev, 0x200, 0x7ff);
+ udelay(1);
+
+ /* Work around for 5354 failures */
-+ if ((dev->id.revision == 2) && (dev->bus->chip_id == 0x5354)) {
++ if (dev->id.revision == 2 && dev->bus->chip_id == 0x5354) {
+ /* Change syn01 reg */
+ tmp = 0x00fe00fe;
+ ssb_write32(dev, 0x894, tmp);
hcd = usb_create_hcd(&ssb_ohci_hc_driver, dev->dev,
dev_name(dev->dev));
-@@ -200,6 +248,7 @@ static int ssb_ohci_resume(struct ssb_de
+@@ -200,6 +245,7 @@ static int ssb_ohci_resume(struct ssb_de
static const struct ssb_device_id ssb_ohci_table[] = {
SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_USB11_HOSTDEV, SSB_ANY_REV),
SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_USB11_HOST, SSB_ANY_REV),
-From cb269cf1f97c316a5184080814a751687c72b718 Mon Sep 17 00:00:00 2001
+From ad224c0d5fa0fc05f8aaef3c19fc9b4eb275a5d2 Mon Sep 17 00:00:00 2001
From: Hauke Mehrtens <hauke@hauke-m.de>
Date: Sun, 18 Jul 2010 21:29:40 +0200
Subject: [PATCH 2/2] USB: Add ehci ssb driver
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
---
drivers/usb/host/Kconfig | 13 ++
- drivers/usb/host/ehci-hcd.c | 23 ++++-
- drivers/usb/host/ehci-ssb.c | 258 +++++++++++++++++++++++++++++++++++++++++++
- 3 files changed, 292 insertions(+), 2 deletions(-)
+ drivers/usb/host/ehci-hcd.c | 22 ++++-
+ drivers/usb/host/ehci-ssb.c | 255 +++++++++++++++++++++++++++++++++++++++++++
+ 3 files changed, 288 insertions(+), 2 deletions(-)
create mode 100644 drivers/usb/host/ehci-ssb.c
--- a/drivers/usb/host/Kconfig
#error "missing bus glue for ehci-hcd"
#endif
-@@ -1220,10 +1225,21 @@ static int __init ehci_hcd_init(void)
+@@ -1220,10 +1225,20 @@ static int __init ehci_hcd_init(void)
if (retval < 0)
goto clean4;
#endif
+ if (retval < 0)
+ goto clean5;
+#endif
-+
return retval;
+#ifdef SSB_EHCI_DRIVER
clean4:
#endif
#ifdef OF_PLATFORM_DRIVER
-@@ -1254,6 +1270,9 @@ module_init(ehci_hcd_init);
+@@ -1254,6 +1269,9 @@ module_init(ehci_hcd_init);
static void __exit ehci_hcd_cleanup(void)
{
#endif
--- /dev/null
+++ b/drivers/usb/host/ehci-ssb.c
-@@ -0,0 +1,258 @@
+@@ -0,0 +1,255 @@
+/*
+ * Sonics Silicon Backplane
+ * Broadcom USB-core EHCI driver (SSB bus glue)
+static void ssb_ehci_detach(struct ssb_device *dev)
+{
+ struct usb_hcd *hcd = ssb_get_drvdata(dev);
++
+ if (hcd->driver->shutdown)
+ hcd->driver->shutdown(hcd);
-+
+ usb_remove_hcd(hcd);
+ iounmap(hcd->regs);
+ release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
+ /*
+ * USB 2.0 special considerations:
+ *
-+ * 1. Since the core supports both ehci and EHCI functions, it must
-+ * only be reset once.
-+ *
-+ * 2. In addition to the standard SSB reset sequence, the Host Control
-+ * Register must be programmed to bring the USB core and various
-+ * phy components out of reset.
++ * In addition to the standard SSB reset sequence, the Host Control
++ * Register must be programmed to bring the USB core and various phy
++ * components out of reset.
+ */
+ ssb_device_enable(dev, 0);
+ ssb_write32(dev, 0x200, 0x7ff);
+ udelay(1);
+
+ /* Work around for 5354 failures */
-+ if ((dev->id.revision == 2) && (dev->bus->chip_id == 0x5354)) {
++ if (dev->id.revision == 2 && dev->bus->chip_id == 0x5354) {
+ /* Change syn01 reg */
+ tmp = 0x00fe00fe;
+ ssb_write32(dev, 0x894, tmp);
projects / thirdparty / openwrt.git / commitdiff
