NULL);
}
+static void pp_dpm_notify_ac_dc(void *handle)
+{
+ struct pp_hwmgr *hwmgr = handle;
+
+ if (!hwmgr || !hwmgr->pm_en)
+ return;
+
+ if (hwmgr->hwmgr_func->notify_ac_dc)
+ hwmgr->hwmgr_func->notify_ac_dc(hwmgr);
+}
+
static const struct amd_pm_funcs pp_dpm_funcs = {
.load_firmware = pp_dpm_load_fw,
.wait_for_fw_loading_complete = pp_dpm_fw_loading_complete,
.gfx_state_change_set = pp_gfx_state_change_set,
.get_smu_prv_buf_details = pp_get_prv_buffer_details,
.pm_compute_clocks = pp_pm_compute_clocks,
+ .notify_ac_dc = pp_dpm_notify_ac_dc,
};
return result;
}
+static void smu7_notify_ac_dc(struct pp_hwmgr *hwmgr)
+{
+ struct amdgpu_device *adev = (struct amdgpu_device *)(hwmgr->adev);
+
+ /* Check if the platform already manages the AC/DC switch via dedicated GPIO. */
+ if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,
+ PHM_PlatformCaps_AutomaticDCTransition))
+ return;
+
+ /* The SMU automatically notices DC, but needs to be notified when switching to AC. */
+ if (adev->pm.ac_power)
+ smum_send_msg_to_smc(hwmgr, PPSMC_MSG_RunningOnAC, NULL);
+}
+
static const struct pp_hwmgr_func smu7_hwmgr_funcs = {
.backend_init = &smu7_hwmgr_backend_init,
.backend_fini = &smu7_hwmgr_backend_fini,
.get_asic_baco_state = smu7_baco_get_state,
.set_asic_baco_state = smu7_baco_set_state,
.power_off_asic = smu7_power_off_asic,
+ .notify_ac_dc = smu7_notify_ac_dc,
};
uint8_t smu7_get_sleep_divider_id_from_clock(uint32_t clock,
bool disable);
ssize_t (*get_gpu_metrics)(struct pp_hwmgr *hwmgr, void **table);
int (*gfx_state_change)(struct pp_hwmgr *hwmgr, uint32_t state);
+ void (*notify_ac_dc)(struct pp_hwmgr *hwmgr);
};
struct pp_table_func {