i2c: qcom: Fix IRQ error misassignement

commit 14718b3e129b058cb716a60c6faf40ef68661c54 upstream.

During cci_isr() errors read from register fields belonging to
i2c master1 are currently assigned to the status field belonging to
i2c master0. This patch corrects this error, and always assigns
master1 errors to the status field of master1.

Fixes: e517526195de ("i2c: Add Qualcomm CCI I2C driver")
Reported-by: Loic Poulain <loic.poulain@linaro.org>
Suggested-by: Loic Poulain <loic.poulain@linaro.org>
Signed-off-by: Robert Foss <robert.foss@linaro.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Wolfram Sang <wsa@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/i2c/busses/i2c-qcom-cci.c b/drivers/i2c/busses/i2c-qcom-cci.c
index f13735beca584405e0394ab878e434a92ab956f7..1c259b5188de8b2e2b7d6e202d088ee51c7f002c 100644 (file)
--- a/drivers/i2c/busses/i2c-qcom-cci.c
+++ b/drivers/i2c/busses/i2c-qcom-cci.c
@@ -194,9 +194,9 @@ static irqreturn_t cci_isr(int irq, void *dev)
        if (unlikely(val & CCI_IRQ_STATUS_0_I2C_M1_ERROR)) {
                if (val & CCI_IRQ_STATUS_0_I2C_M1_Q0_NACK_ERR ||
                        val & CCI_IRQ_STATUS_0_I2C_M1_Q1_NACK_ERR)
-                       cci->master[0].status = -ENXIO;
+                       cci->master[1].status = -ENXIO;
                else
-                       cci->master[0].status = -EIO;
+                       cci->master[1].status = -EIO;
 
                writel(CCI_HALT_REQ_I2C_M1_Q0Q1, cci->base + CCI_HALT_REQ);
                ret = IRQ_HANDLED;