Merge r1851 (Allow 64-byte line sizes (PA6T cpu)).

git-svn-id: svn://svn.valgrind.org/vex/branches/VEX_3_3_BRANCH@1852

diff --git a/VEX/priv/guest-ppc/toIR.c b/VEX/priv/guest-ppc/toIR.c
index 858833022d242db3605cce102258cb790e84f9e4..82e9c1d71ee3038ce655669f9d367a52c067a381 100644 (file)
--- a/VEX/priv/guest-ppc/toIR.c
+++ b/VEX/priv/guest-ppc/toIR.c
@@ -5582,7 +5582,7 @@ static Bool dis_cache_manage ( UInt         theInstr,
    }
 
    /* stay sane .. */
-   vassert(lineszB == 32 || lineszB == 128);
+   vassert(lineszB == 32 || lineszB == 64 || lineszB == 128);
    
    switch (opc2) {
 //zz    case 0x2F6: // dcba (Data Cache Block Allocate, PPC32 p380)