drm/amdgpu: apply state adjust rules to some additional HAINAN vairants

They need a similar workaround.

Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/1839
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
(cherry picked from commit 0de31d92a173d3d94f28051b0b80a6c98913aed4)
Cc: stable@vger.kernel.org

diff --git a/drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c b/drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c
index 61b1c5aa74cb5161261d91961c8ef53906288268..36942467d4addafc77050e4a632a86dea088f381 100644 (file)
--- a/drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c
+++ b/drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c
@@ -3454,9 +3454,11 @@ static void si_apply_state_adjust_rules(struct amdgpu_device *adev,
        if (adev->asic_type == CHIP_HAINAN) {
                if ((adev->pdev->revision == 0x81) ||
                    (adev->pdev->revision == 0xC3) ||
+                   (adev->pdev->device == 0x6660) ||
                    (adev->pdev->device == 0x6664) ||
                    (adev->pdev->device == 0x6665) ||
-                   (adev->pdev->device == 0x6667)) {
+                   (adev->pdev->device == 0x6667) ||
+                   (adev->pdev->device == 0x666F)) {
                        max_sclk = 75000;
                }
                if ((adev->pdev->revision == 0xC3) ||