]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
riscv: dts: spacemit: add Ethernet and PDMA to OrangePi RV2
authorMichael Opdenacker <michael.opdenacker@rootcommit.com>
Wed, 22 Oct 2025 20:18:38 +0000 (20:18 +0000)
committerYixun Lan <dlan@gentoo.org>
Fri, 24 Oct 2025 06:18:47 +0000 (14:18 +0800)
The OrangePi RV2 board ships two RGMII ethernet ports.
Each has an external Motorcomm YT8531C PHY attached, the PHY uses GPIO
for reset pin control.

Enable PDMA for the SpacemiT K1-based SoC in the OrangePi RV2 board.

Signed-off-by: Michael Opdenacker <michael.opdenacker@rootcommit.com>
Reviewed-by: Yixun Lan <dlan@gentoo.org>
Link: https://lore.kernel.org/r/20251022201807.1474789-2-michael.opdenacker@rootcommit.com
Signed-off-by: Yixun Lan <dlan@gentoo.org>
arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts

index 337240ebb7b794cd1e7694126e6cd60e6c361fe5..41dc8e35e6ebe4c00bdfa69b8a62f0e1d23d319a 100644 (file)
@@ -15,6 +15,8 @@
 
        aliases {
                serial0 = &uart0;
+               ethernet0 = &eth0;
+               ethernet1 = &eth1;
        };
 
        chosen {
        };
 };
 
+&eth0 {
+       phy-handle = <&rgmii0>;
+       phy-mode = "rgmii-id";
+       pinctrl-names = "default";
+       pinctrl-0 = <&gmac0_cfg>;
+       rx-internal-delay-ps = <0>;
+       tx-internal-delay-ps = <0>;
+       status = "okay";
+
+       mdio-bus {
+               #address-cells = <0x1>;
+               #size-cells = <0x0>;
+
+               reset-gpios = <&gpio K1_GPIO(110) GPIO_ACTIVE_LOW>;
+               reset-delay-us = <10000>;
+               reset-post-delay-us = <100000>;
+
+               rgmii0: phy@1 {
+                       reg = <0x1>;
+               };
+       };
+};
+
+&eth1 {
+       phy-handle = <&rgmii1>;
+       phy-mode = "rgmii-id";
+       pinctrl-names = "default";
+       pinctrl-0 = <&gmac1_cfg>;
+       rx-internal-delay-ps = <0>;
+       tx-internal-delay-ps = <250>;
+       status = "okay";
+
+       mdio-bus {
+               #address-cells = <0x1>;
+               #size-cells = <0x0>;
+
+               reset-gpios = <&gpio K1_GPIO(115) GPIO_ACTIVE_LOW>;
+               reset-delay-us = <10000>;
+               reset-post-delay-us = <100000>;
+
+               rgmii1: phy@1 {
+                       reg = <0x1>;
+               };
+       };
+};
+
+&pdma {
+       status = "okay";
+};
+
 &uart0 {
        pinctrl-names = "default";
        pinctrl-0 = <&uart0_2_cfg>;