+2016-04-27 Uros Bizjak <ubizjak@gmail.com>
+
+ * config/i386/i386.c (ix86_spill_class): Enable for TARGET_SSE2 when
+ inter-unit moves to/from vector registers are enabled. Do not disable
+ for TARGET_MMX.
+
2016-04-27 David Malcolm <dmalcolm@redhat.com>
* df.h (DF_SCAN, DF_LR, DF_LIVE, DF_RD, DF_CHAIN, DF_WORD_LR,
reflect the removal of the leading "i" field for INSN_UID in
r210360. Fix bogus apostrophe.
+2016-04-27 Uros Bizjak <ubizjak@gmail.com>
+
+ * config/i386/i386.c (ix86_spill_class): Enable for TARGET_SSE2 when
+ inter-unit moves to/from vector registers are enabled. Do not disable
+ for TARGET_MMX.
+
2016-04-27 Uros Bizjak <ubizjak@gmail.com>
* config/i386/i386.md
2016-04-27 H.J. Lu <hongjiu.lu@intel.com>
PR target/70155
- * config/i386/i386.c (scalar_to_vector_candidate_p): Renamed
- to ...
+ * config/i386/i386.c (scalar_to_vector_candidate_p): Renamed to ...
(dimode_scalar_to_vector_candidate_p): This.
(timode_scalar_to_vector_candidate_p): New function.
(scalar_to_vector_candidate_p): Likewise.
directly without checking mode class.
2016-04-20 Andrew Pinski <apinski@cavium.com>
- Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+ Kyrylo Tkachov <kyrylo.tkachov@arm.com>
PR target/64971
* config/aarch64/aarch64.md (sibcall): Force call
2016-04-18 Richard Biener <rguenther@suse.de>
- PR middle-end/37870
+ PR middle-end/37870
* expmed.c (extract_bit_field_1): Remove broken case
using a wider MODE_INT mode.
static reg_class_t
ix86_spill_class (reg_class_t rclass, machine_mode mode)
{
- if (TARGET_SSE && TARGET_GENERAL_REGS_SSE_SPILL && ! TARGET_MMX
+ if (TARGET_GENERAL_REGS_SSE_SPILL
+ && TARGET_SSE2
+ && TARGET_INTER_UNIT_MOVES_TO_VEC
+ && TARGET_INTER_UNIT_MOVES_FROM_VEC
&& (mode == SImode || (TARGET_64BIT && mode == DImode))
- && rclass != NO_REGS && INTEGER_CLASS_P (rclass))
+ && INTEGER_CLASS_P (rclass))
return ALL_SSE_REGS;
return NO_REGS;
}