]> git.ipfire.org Git - thirdparty/gcc.git/commitdiff
i386.c (ix86_spill_class): Enable for TARGET_SSE2 when inter-unit moves to/from vecto...
authorUros Bizjak <uros@gcc.gnu.org>
Wed, 27 Apr 2016 18:10:02 +0000 (20:10 +0200)
committerUros Bizjak <uros@gcc.gnu.org>
Wed, 27 Apr 2016 18:10:02 +0000 (20:10 +0200)
* config/i386/i386.c (ix86_spill_class): Enable for TARGET_SSE2 when
inter-unit moves to/from vector registers are enabled.  Do not disable
for TARGET_MMX.

From-SVN: r235523

gcc/ChangeLog
gcc/config/i386/i386.c

index 6302382d8facd89a3afeaea44b906b8b0c3a3db0..cac640e0db1d61783aec0c514b5a8c3cd90210e4 100644 (file)
@@ -1,3 +1,9 @@
+2016-04-27  Uros Bizjak  <ubizjak@gmail.com>
+
+       * config/i386/i386.c (ix86_spill_class): Enable for TARGET_SSE2 when
+       inter-unit moves to/from vector registers are enabled.  Do not disable
+       for TARGET_MMX.
+
 2016-04-27  David Malcolm  <dmalcolm@redhat.com>
 
        * df.h (DF_SCAN, DF_LR, DF_LIVE, DF_RD, DF_CHAIN, DF_WORD_LR,
        reflect the removal of the leading "i" field for INSN_UID in
        r210360.  Fix bogus apostrophe.
 
+2016-04-27  Uros Bizjak  <ubizjak@gmail.com>
+
+       * config/i386/i386.c (ix86_spill_class): Enable for TARGET_SSE2 when
+       inter-unit moves to/from vector registers are enabled.  Do not disable
+       for TARGET_MMX.
+
 2016-04-27  Uros Bizjak  <ubizjak@gmail.com>
 
        * config/i386/i386.md
@@ -21,8 +33,7 @@
 2016-04-27  H.J. Lu  <hongjiu.lu@intel.com>
 
        PR target/70155
-       * config/i386/i386.c (scalar_to_vector_candidate_p): Renamed
-       to ...
+       * config/i386/i386.c (scalar_to_vector_candidate_p): Renamed to ...
        (dimode_scalar_to_vector_candidate_p): This.
        (timode_scalar_to_vector_candidate_p): New function.
        (scalar_to_vector_candidate_p): Likewise.
        directly without checking mode class.
 
 2016-04-20  Andrew Pinski  <apinski@cavium.com>
-            Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+           Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 
        PR target/64971
        * config/aarch64/aarch64.md (sibcall): Force call
 
 2016-04-18  Richard Biener  <rguenther@suse.de>
 
-        PR middle-end/37870
+       PR middle-end/37870
        * expmed.c (extract_bit_field_1): Remove broken case
        using a wider MODE_INT mode.
 
index fa23a266d746a51bf0c88e7cce1ac12c68d324f9..84a589aabe647fdb4a11298da99b57654f9dfb48 100644 (file)
@@ -53874,9 +53874,12 @@ ix86_get_mask_mode (unsigned nunits, unsigned vector_size)
 static reg_class_t
 ix86_spill_class (reg_class_t rclass, machine_mode mode)
 {
-  if (TARGET_SSE && TARGET_GENERAL_REGS_SSE_SPILL && ! TARGET_MMX
+  if (TARGET_GENERAL_REGS_SSE_SPILL
+      && TARGET_SSE2
+      && TARGET_INTER_UNIT_MOVES_TO_VEC
+      && TARGET_INTER_UNIT_MOVES_FROM_VEC
       && (mode == SImode || (TARGET_64BIT && mode == DImode))
-      && rclass != NO_REGS && INTEGER_CLASS_P (rclass))
+      && INTEGER_CLASS_P (rclass))
     return ALL_SSE_REGS;
   return NO_REGS;
 }