rs6000.md (movsf): Disable explicit secondary-reload-like functionality if TARGET_POW...

        * rs6000.md (movsf): Disable explicit secondary-reload-like
        functionality if TARGET_POWERPC64.
        (movdf): Remove TARGET_POWERPC64 explicit secondary-reload-like
        functionality.

From-SVN: r23266

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index cbd42d8a12cce230a77d33a8ffd46c1294e9d647..29ced761fce3c15f0ea451b7d734fc31c6926b0e 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+Fri Oct 23 22:41:40 1998  David Edelsohn  <edelsohn@mhpcc.edu>
+
+       * rs6000.md (movsf): Disable explicit secondary-reload-like
+       functionality if TARGET_POWERPC64.
+       (movdf): Remove TARGET_POWERPC64 explicit secondary-reload-like
+       functionality.
+
 Fri Oct 23 22:38:57 1998  Jeffrey A Law  (law@cygnus.com)
 
        * m68k.md (5200 movqi): Do not allow byte sized memory references

diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index 04dac689b6b559036de5d8c10f0e48fd837dd0f5..648e0aaf0850effa1f77d0e89026fbb7953a50f3 100644 (file)
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -5686,7 +5686,8 @@
 
   else if (TARGET_HARD_FLOAT)
     {
-      if (GET_CODE (operands[1]) == REG && REGNO (operands[1]) < 32)
+      if (! TARGET_POWERPC64
+         && GET_CODE (operands[1]) == REG && REGNO (operands[1]) < 32)
        {
          /* If this is a store to memory or another integer register do the
             move directly.  Otherwise store to a temporary stack slot and
@@ -5729,7 +5730,8 @@
          operands[1] = force_reg (SFmode, operands[1]);
        }
 
-      if (GET_CODE (operands[0]) == REG && REGNO (operands[0]) < 32)
+      if (! TARGET_POWERPC64
+         && GET_CODE (operands[0]) == REG && REGNO (operands[0]) < 32)
        {
          if (GET_CODE (operands[1]) == MEM
 #if HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT && ! defined(REAL_IS_NOT_DOUBLE)
@@ -5848,23 +5850,6 @@
   if (GET_CODE (operands[0]) != REG)
     operands[1] = force_reg (DFmode, operands[1]);
 
-      /* Stores between FPR and any non-FPR registers must go through a
-         temporary stack slot.  */
-
-  if (TARGET_POWERPC64
-      && GET_CODE (operands[0]) == REG && GET_CODE (operands[1]) == REG
-      && ((FP_REGNO_P (REGNO (operands[0]))
-          && ! FP_REGNO_P (REGNO (operands[1])))
-         || (FP_REGNO_P (REGNO (operands[1]))
-             && ! FP_REGNO_P (REGNO (operands[0])))))
-    {
-      rtx stack_slot = assign_stack_temp (DFmode, 8, 0);
-
-      emit_move_insn (stack_slot, operands[1]);
-      emit_move_insn (operands[0], stack_slot);
-      DONE;
-    }
-
   if (CONSTANT_P (operands[1]) && ! easy_fp_constant (operands[1], DFmode))
     {
       operands[1] = force_const_mem (DFmode, operands[1]);