Document support for setting the Bit Clock Swap bit in CR2 register
via new "fsl,sai-bit-clock-swap" DT property. This bit swaps the
bit clock used by the transmitter or receiver in asynchronous mode,
i.e. makes transmitter use RX_BCLK and TX_SYNC, and vice versa,
makes receiver use TX_BCLK and RX_SYNC.
Signed-off-by: Marek Vasut <marex@nabladev.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://patch.msgid.link/20260404183547.46509-1-marex@nabladev.com
Signed-off-by: Mark Brown <broonie@kernel.org>
of transmitter.
type: boolean
+ fsl,sai-bit-clock-swap:
+ description:
+ Enable Bit Clock Swap, which swaps the bit clock used by the transmitter
+ or receiver in asynchronous mode, i.e. makes transmitter use RX_BCLK and
+ TX_SYNC, and vice versa, makes receiver use TX_BCLK and RX_SYNC.
+ type: boolean
+
fsl,shared-interrupt:
description: Interrupt is shared with other modules.
type: boolean