This release has:
- SBI debug triggers (DBTR) extension (Experimental)
- Support to specify coldboot harts in DT
- Relocatable FW_JUMP_ADDR and FW_JUMP_FDT_ADDR
- Smcsrind and Smcdeleg extensions support
- SBIUnit testing framework
- Initial domain context management support
- Platform specific load/store emulation callbacks
- New trap context
- Improved sbi_trap_error() to dump state in a nested trap
- SBI supervisor software events (SSE) extension (Experimental)
- Simplified wait_for_coldboot() implementation
- Early wakeup of non-coldboot HART in the coldboot path
- Sophgo CV18XX/SG200X series support
- APLIC delegation DT property fix
- Svade and Svadu extensions support
- SBI firmware features (FWFT) extension (Experimental)
Overall, this release mainly adds more ISA extensions, SBI
extensions and other improvements.
Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
inherit autotools-brokensep deploy
-SRCREV = "a2b255b88918715173942f2c5e1f97ac9e90c877"
+SRCREV = "455de672dd7c2aa1992df54dfb08dc11abbc1b1a"
SRC_URI = "git://github.com/riscv/opensbi.git;branch=master;protocol=https"
S = "${WORKDIR}/git"
TARGET_CC_ARCH += "${LDFLAGS}"
-EXTRA_OEMAKE += "PLATFORM=${RISCV_SBI_PLAT} I=${D} FW_PIC=y CLANG_TARGET= "
+RISCV_SBI_FW_TEXT_START ??= "0x80000000"
+EXTRA_OEMAKE += "PLATFORM=${RISCV_SBI_PLAT} I=${D} FW_TEXT_START=${RISCV_SBI_FW_TEXT_START}"
# If RISCV_SBI_PAYLOAD is set then include it as a payload
EXTRA_OEMAKE:append = " ${@riscv_get_extra_oemake_image(d)}"
EXTRA_OEMAKE:append = " ${@riscv_get_extra_oemake_fdt(d)}"