gpio: mvebu: Convert generic irqchip locking to guard()

Conversion was done with coccinelle.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/all/20250313142524.262678485@linutronix.de

diff --git a/drivers/gpio/gpio-mvebu.c b/drivers/gpio/gpio-mvebu.c
index 3604abcb6fecb3a12b67803fe26cd19d28414173..2581fbbfbad31abdd7f3f9e54efbbce12b02779b 100644 (file)
--- a/drivers/gpio/gpio-mvebu.c
+++ b/drivers/gpio/gpio-mvebu.c
@@ -408,9 +408,8 @@ static void mvebu_gpio_irq_ack(struct irq_data *d)
        struct mvebu_gpio_chip *mvchip = gc->private;
        u32 mask = d->mask;
 
-       irq_gc_lock(gc);
+       guard(raw_spinlock)(&gc->lock);
        mvebu_gpio_write_edge_cause(mvchip, ~mask);
-       irq_gc_unlock(gc);
 }
 
 static void mvebu_gpio_edge_irq_mask(struct irq_data *d)
@@ -420,10 +419,9 @@ static void mvebu_gpio_edge_irq_mask(struct irq_data *d)
        struct irq_chip_type *ct = irq_data_get_chip_type(d);
        u32 mask = d->mask;
 
-       irq_gc_lock(gc);
+       guard(raw_spinlock)(&gc->lock);
        ct->mask_cache_priv &= ~mask;
        mvebu_gpio_write_edge_mask(mvchip, ct->mask_cache_priv);
-       irq_gc_unlock(gc);
 }
 
 static void mvebu_gpio_edge_irq_unmask(struct irq_data *d)
@@ -433,11 +431,10 @@ static void mvebu_gpio_edge_irq_unmask(struct irq_data *d)
        struct irq_chip_type *ct = irq_data_get_chip_type(d);
        u32 mask = d->mask;
 
-       irq_gc_lock(gc);
+       guard(raw_spinlock)(&gc->lock);
        mvebu_gpio_write_edge_cause(mvchip, ~mask);
        ct->mask_cache_priv |= mask;
        mvebu_gpio_write_edge_mask(mvchip, ct->mask_cache_priv);
-       irq_gc_unlock(gc);
 }
 
 static void mvebu_gpio_level_irq_mask(struct irq_data *d)
@@ -447,10 +444,9 @@ static void mvebu_gpio_level_irq_mask(struct irq_data *d)
        struct irq_chip_type *ct = irq_data_get_chip_type(d);
        u32 mask = d->mask;
 
-       irq_gc_lock(gc);
+       guard(raw_spinlock)(&gc->lock);
        ct->mask_cache_priv &= ~mask;
        mvebu_gpio_write_level_mask(mvchip, ct->mask_cache_priv);
-       irq_gc_unlock(gc);
 }
 
 static void mvebu_gpio_level_irq_unmask(struct irq_data *d)
@@ -460,10 +456,9 @@ static void mvebu_gpio_level_irq_unmask(struct irq_data *d)
        struct irq_chip_type *ct = irq_data_get_chip_type(d);
        u32 mask = d->mask;
 
-       irq_gc_lock(gc);
+       guard(raw_spinlock)(&gc->lock);
        ct->mask_cache_priv |= mask;
        mvebu_gpio_write_level_mask(mvchip, ct->mask_cache_priv);
-       irq_gc_unlock(gc);
 }
 
 /*****************************************************************************