i386: Fix up signbit<mode>2 expander [PR112816]

The following testcase ICEs, because the signbit<mode>2 expander uses an
explicit SUBREG in the pattern around match_operand with register_operand
predicate.  If we are unlucky enough that expansion tries to expand it
with some SUBREG as operands[1], we have two nested SUBREGs in the IL,
which is not valid and causes ICE later.

2023-12-04  Jakub Jelinek  <jakub@redhat.com>

	PR target/112816
	* config/i386/sse.md (signbit<mode>2): Force operands[1] into a REG.

	* gcc.target/i386/sse2-pr112816.c: New test.

diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index a1d4fec42a2ee28aa1f261a64959070b13f2b4ed..0df33419f73a7e1c047b7bdb87a6a0e4ab0bbd4d 100644 (file)
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -5116,7 +5116,10 @@
            (match_operand:VF1_AVX2 1 "register_operand") 0)
          (match_dup 2)))]
   "TARGET_SSE2"
-  "operands[2] = GEN_INT (GET_MODE_UNIT_BITSIZE (<MODE>mode)-1);")
+{
+  operands[1] = force_reg (<MODE>mode, operands[1]);
+  operands[2] = GEN_INT (GET_MODE_UNIT_BITSIZE (<MODE>mode)-1);
+})
 
 ;; Also define scalar versions.  These are used for abs, neg, and
 ;; conditional move.  Using subregs into vector modes causes register

diff --git a/gcc/testsuite/gcc.target/i386/sse2-pr112816.c b/gcc/testsuite/gcc.target/i386/sse2-pr112816.c
new file mode 100644 (file)
index 0000000..0701f3c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/sse2-pr112816.c
@@ -0,0 +1,16 @@
+/* PR target/112816 */
+/* { dg-do compile } */
+/* { dg-options "-O2 -msse2" } */
+
+#define N 4
+struct S { float x[N]; };
+struct T { int x[N]; };
+
+struct T
+foo (struct S x)
+{
+  struct T res;
+  for (int i = 0; i < N; ++i)
+    res.x[i] = __builtin_signbit (x.x[i]) ? -1 : 0;
+  return res;
+}