]> git.ipfire.org Git - thirdparty/u-boot.git/commitdiff
ARM: dts: stm32: Switch defconfig to SPL for DH STM32MP13xx DHCOR DHSBC
authorMarek Vasut <marek.vasut@mailbox.org>
Mon, 30 Jun 2025 00:10:36 +0000 (02:10 +0200)
committerPatrice Chotard <patrice.chotard@foss.st.com>
Tue, 29 Jul 2025 15:02:31 +0000 (17:02 +0200)
Update defconfig to make use of U-Boot SPL to initialize DH STM32MP13xx
DHCOM DHSBC SoM and board. This is largely a move of SPL enablement from
DH STM32MP15xx DHSOM defconfigs into generic DH STM32MP1xx defconfig .
Support for SPI NOR chips which are not used on STM32MP13xx DHCOR are
moved into STM32MP15xx DHSOM defconfigs. Changes to STM32MP13xx DHCOR
defconfig then enable SPL support, CCF in SPL to configure clock, pin
configuration support in SPL, and OpTee OS start support in U-Boot.

Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Marek Vasut <marek.vasut@mailbox.org>
configs/stm32mp13_dhcor_defconfig
configs/stm32mp15_dhsom.config
configs/stm32mp_dhsom.config

index e5aaadd3920fc02a3e7ea6750474044e336f9fee..c21416459e61375424918a4401c4502b33434ba9 100644 (file)
@@ -2,7 +2,6 @@
 
 CONFIG_ARM=y
 CONFIG_ARCH_STM32MP=y
-CONFIG_TFABOOT=y
 CONFIG_SYS_MALLOC_F_LEN=0x1c0000
 CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0400000
 CONFIG_ENV_OFFSET=0x3E0000
@@ -12,11 +11,16 @@ CONFIG_DDR_CACHEABLE_SIZE=0x8000000
 CONFIG_TARGET_ST_STM32MP13X=y
 CONFIG_ENV_OFFSET_REDUND=0x3F0000
 CONFIG_STM32MP15_PWR=y
-# CONFIG_ARMV7_NONSEC is not set
+CONFIG_ARMV7_NONSEC=y
+CONFIG_ARMV7_BOOT_SEC_DEFAULT=y
+CONFIG_ARMV7_PSCI_NR_CPUS=2
+# CONFIG_ARMV7_LPAE is not set
 CONFIG_SYS_MEMTEST_START=0xc0000000
 CONFIG_SYS_MEMTEST_END=0xc4000000
+CONFIG_SYS_MEM_TOP_HIDE=0x2000000
 CONFIG_BOOTSTAGE_RECORD_COUNT=100
 CONFIG_BOOTDELAY=3
+CONFIG_BOOTM_OPTEE=y
 CONFIG_SYS_CONSOLE_IS_IN_ENV=y
 CONFIG_CMD_ASKENV=y
 CONFIG_CMD_ERASEENV=y
@@ -31,20 +35,28 @@ CONFIG_ENV_IS_NOWHERE=y
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_ENV_MMC_USE_DT=y
 CONFIG_ENV_SPI_MAX_HZ=50000000
-CONFIG_CLK_SCMI=y
 CONFIG_SET_DFU_ALT_INFO=y
 CONFIG_SYS_I2C_EEPROM_ADDR=0x50
 CONFIG_ENV_MMC_DEVICE_INDEX=0
 CONFIG_ENV_MMC_EMMC_HW_PARTITION=1
 CONFIG_PHY_REALTEK=y
-CONFIG_DM_REGULATOR_SCMI=y
-CONFIG_RESET_SCMI=y
 CONFIG_DM_RNG=y
 CONFIG_RNG_STM32=y
-CONFIG_SYSRESET_PSCI=y
-CONFIG_TEE=y
-CONFIG_OPTEE=y
-# CONFIG_OPTEE_TA_AVB is not set
 CONFIG_USB_ONBOARD_HUB=y
 CONFIG_USB_HUB_DEBOUNCE_TIMEOUT=2000
 CONFIG_ERRNO_STR=y
+CONFIG_OPTEE_LIB=y
+CONFIG_OPTEE_IMAGE=y
+CONFIG_OPTEE_TZDRAM_SIZE=0x02000000
+CONFIG_SPL_TEXT_BASE=0x2FFE0000
+CONFIG_SPL_CLK_CCF=y
+CONFIG_SPL_CLK_COMPOSITE_CCF=y
+# CONFIG_SPL_SHA1 is not set
+# CONFIG_SPL_SHA256 is not set
+CONFIG_SPL_HAVE_INIT_STACK=y
+CONFIG_SPL_SYS_MALLOC_F_LEN=0x8000
+CONFIG_SPL_PINCTRL=y
+CONFIG_SPL_PINCTRL_GENERIC=y
+CONFIG_SPL_PINMUX=y
+CONFIG_SPL_PINCONF=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000
index c84116482f6cd3e51b328585d6784f9aeec9c30e..f7ff5db5943dd19f31cd253e51141058d196ad17 100644 (file)
@@ -2,10 +2,6 @@
 
 # CONFIG_ARMV7_VIRT is not set
 # CONFIG_BINMAN_FDT is not set
-# CONFIG_SPL_DOS_PARTITION is not set
-# CONFIG_SPL_PARTITION_UUIDS is not set
-# CONFIG_SPL_PINCTRL_FULL is not set
-# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
 CONFIG_BOARD_EARLY_INIT_F=y
 CONFIG_BOARD_SIZE_LIMIT=1441792
 CONFIG_BOOTCOUNT_BOOTLIMIT=3
@@ -20,9 +16,7 @@ CONFIG_CMD_STM32PROG_OTP=y
 CONFIG_CONSOLE_MUX=y
 CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0100000
 CONFIG_DM_HWSPINLOCK=y
-CONFIG_DM_REGULATOR_STM32_VREFBUF=y
 CONFIG_HAS_BOARD_SIZE_LIMIT=y
-CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
 CONFIG_HWSPINLOCK_STM32=y
 CONFIG_KS8851_MLL=y
 CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-names interrupts-extended interrupt-controller \\\#interrupt-cells interrupt-parent dmas dma-names assigned-clocks assigned-clock-rates assigned-clock-parents hwlocks access-controllers"
@@ -31,42 +25,7 @@ CONFIG_PINCTRL_STMFX=y
 CONFIG_REMOTEPROC_STM32_COPRO=y
 CONFIG_SERVERIP="192.168.1.1"
 CONFIG_SF_DEFAULT_SPEED=50000000
-CONFIG_SPL=y
-CONFIG_SPL_BLOCK_CACHE=y
-CONFIG_SPL_BOOTCOUNT_LIMIT=y
-CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0xc0300000
-CONFIG_SPL_DFU=y
-CONFIG_SPL_DM_REGULATOR=y
-CONFIG_SPL_DM_REGULATOR_STPMIC1=y
-CONFIG_SPL_DM_SPI=y
-CONFIG_SPL_DM_SPI_FLASH=y
-CONFIG_SPL_DM_USB_GADGET=y
-CONFIG_SPL_ENV_IS_NOWHERE=y
-CONFIG_SPL_ENV_SUPPORT=y
-CONFIG_SPL_FOOTPRINT_LIMIT=y
-CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
-CONFIG_SPL_I2C=y
-CONFIG_SPL_LEGACY_IMAGE_FORMAT=y
-CONFIG_SPL_LOAD_FIT=y
-CONFIG_SPL_LOAD_FIT_ADDRESS=0xc1000000
-CONFIG_SPL_MAX_FOOTPRINT=0x3db00
-CONFIG_SPL_MMC=y
-CONFIG_SPL_MTD=y
-CONFIG_SPL_PHY=y
-CONFIG_SPL_POWER=y
-CONFIG_SPL_RAM_DEVICE=y
-CONFIG_SPL_SPI=y
-CONFIG_SPL_SPI_FLASH_MTD=y
-CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_HAVE_INIT_STACK=y
-CONFIG_SPL_STACK=0x30000000
-CONFIG_SPL_SYS_MALLOC=y
-CONFIG_SPL_SYS_MALLOC_SIZE=0x1d00000
-CONFIG_SPL_SYS_MMCSD_RAW_MODE=y
-CONFIG_SPL_TEXT_BASE=0x2FFC2500
-CONFIG_SPL_USB_GADGET=y
 CONFIG_STM32_ADC=y
-CONFIG_SYSRESET_SYSCON=y
 CONFIG_SYS_BOOTCOUNT_ADDR=0x5C00A14C
 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=0x3
 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y
@@ -76,3 +35,10 @@ CONFIG_PREBOOT="run dh_preboot"
 CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000
 CONFIG_TARGET_DH_STM32MP1_PDK2=y
 CONFIG_USE_SERVERIP=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPL_LEGACY_IMAGE_FORMAT=y
+CONFIG_SPL_TEXT_BASE=0x2FFC2500
+CONFIG_SPL_BLOCK_CACHE=y
+CONFIG_SPL_MMC=y
index 777a02dfe158d2fffd966e09fd8d27e5c2f64c2d..56a40839d28e9c273276b6919d85baa1e1b864fc 100644 (file)
@@ -2,6 +2,10 @@
 # CONFIG_CMD_EXPORTENV is not set
 # CONFIG_EFI_LOADER is not set
 # CONFIG_ISO_PARTITION is not set
+# CONFIG_SPL_DOS_PARTITION is not set
+# CONFIG_SPL_PARTITION_UUIDS is not set
+# CONFIG_SPL_PINCTRL_FULL is not set
+# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
 CONFIG_BOOTCOMMAND="run bootcmd_stm32mp"
 CONFIG_BOOTCOUNT_LIMIT=y
 CONFIG_CMD_BOOTCOUNT=y
@@ -38,6 +42,7 @@ CONFIG_DM_REGULATOR=y
 CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_DM_REGULATOR_GPIO=y
 CONFIG_DM_REGULATOR_STPMIC1=y
+CONFIG_DM_REGULATOR_STM32_VREFBUF=y
 CONFIG_DM_RTC=y
 CONFIG_DM_SPI=y
 CONFIG_DM_SPI_FLASH=y
@@ -49,6 +54,7 @@ CONFIG_ENV_SIZE=0x4000
 CONFIG_FAT_WRITE=y
 CONFIG_FIT=y
 CONFIG_GPIO_HOG=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
 CONFIG_I2C_EEPROM=y
 CONFIG_IPV6=y
 CONFIG_IP_DEFRAG=y
@@ -58,6 +64,7 @@ CONFIG_MTD=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_OF_LIVE=y
 CONFIG_OF_UPSTREAM=y
+CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-names interrupts-extended interrupt-controller \\\#interrupt-cells interrupt-parent dmas dma-names assigned-clocks assigned-clock-rates assigned-clock-parents hwlocks"
 CONFIG_PHY=y
 CONFIG_PHY_STM32_USBPHYC=y
 CONFIG_PINCONF=y
@@ -66,17 +73,39 @@ CONFIG_PROT_TCP_SACK=y
 CONFIG_RTC_STM32=y
 CONFIG_SERIAL_RX_BUFFER=y
 CONFIG_SPI=y
-CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_MTD=y
 CONFIG_SPI_FLASH_SFDP_SUPPORT=y
-CONFIG_SPI_FLASH_SPANSION=y
-CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_SPL=y
+CONFIG_SPL_BOOTCOUNT_LIMIT=y
+CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0xc0300000
+CONFIG_SPL_DFU=y
+CONFIG_SPL_DM_SPI=y
+CONFIG_SPL_DM_SPI_FLASH=y
+CONFIG_SPL_ENV_IS_NOWHERE=y
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_FOOTPRINT_LIMIT=y
+CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
+CONFIG_SPL_I2C=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL_LOAD_FIT_ADDRESS=0xc1000000
+CONFIG_SPL_MAX_FOOTPRINT=0x3db00
+CONFIG_SPL_MTD=y
+CONFIG_SPL_PHY=y
+CONFIG_SPL_POWER=y
+CONFIG_SPL_RAM_DEVICE=y
+CONFIG_SPL_SPI=y
+CONFIG_SPL_SPI_FLASH_MTD=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_STACK=0x30000000
+CONFIG_SPL_SYS_MALLOC=y
+CONFIG_SPL_SYS_MALLOC_SIZE=0x1d00000
 CONFIG_STM32_FMC2_EBI=y
 CONFIG_STM32_QSPI=y
 CONFIG_STM32_SDMMC2=y
 CONFIG_STM32_SPI=y
 CONFIG_SUPPORT_EMMC_BOOT=y
+CONFIG_SYSRESET_SYSCON=y
 CONFIG_SYS_BOOTCOUNT_MAGIC=0xB0C40000
 CONFIG_SYS_BOOTM_LEN=0x2000000
 CONFIG_SYS_DISABLE_AUTOLOAD=y