]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
arm64: dts: renesas: Add pinctrl reset-names for RZ/G2L and RZ/V2H family SoCs
authorBiju Das <biju.das.jz@bp.renesas.com>
Tue, 17 Mar 2026 10:16:16 +0000 (10:16 +0000)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Tue, 12 May 2026 09:52:11 +0000 (11:52 +0200)
Add reset-names properties to the pin control nodes for
RZ/{G2L,G2UL,G3E,G3S} and RZ/{V2H,V2L,V2N} SoCs.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20260317101627.174491-4-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
arch/arm64/boot/dts/renesas/r9a07g043.dtsi
arch/arm64/boot/dts/renesas/r9a07g044.dtsi
arch/arm64/boot/dts/renesas/r9a07g054.dtsi
arch/arm64/boot/dts/renesas/r9a08g045.dtsi
arch/arm64/boot/dts/renesas/r9a09g047.dtsi
arch/arm64/boot/dts/renesas/r9a09g056.dtsi
arch/arm64/boot/dts/renesas/r9a09g057.dtsi

index 593c66b27ad126d476777ff439567fcc905b8c75..ded4f1f11d6052fe14c7bbb4c6aab349b32f0b7f 100644 (file)
                        resets = <&cpg R9A07G043_GPIO_RSTN>,
                                 <&cpg R9A07G043_GPIO_PORT_RESETN>,
                                 <&cpg R9A07G043_GPIO_SPARE_RESETN>;
+                       reset-names = "rstn", "port", "spare";
                };
 
                dmac: dma-controller@11820000 {
index 29273da8199519d71429c2d391b9d2cf39162c76..cb0c9550aa0334eed808ebc3417f493eb6b2f6a0 100644 (file)
                        resets = <&cpg R9A07G044_GPIO_RSTN>,
                                 <&cpg R9A07G044_GPIO_PORT_RESETN>,
                                 <&cpg R9A07G044_GPIO_SPARE_RESETN>;
+                       reset-names = "rstn", "port", "spare";
                };
 
                irqc: interrupt-controller@110a0000 {
index 0dee48c4f1e44a683d97970ad33eddc3733ce63b..7a3e5b6a685f54740419b3e1f166401de78299bc 100644 (file)
                        resets = <&cpg R9A07G054_GPIO_RSTN>,
                                 <&cpg R9A07G054_GPIO_PORT_RESETN>,
                                 <&cpg R9A07G054_GPIO_SPARE_RESETN>;
+                       reset-names = "rstn", "port", "spare";
                };
 
                irqc: interrupt-controller@110a0000 {
index 997e6cf0bb824659809ff3d724fb31812ad94ac4..3a69bb246babd0a8d48a4dea6a6b5ca69b3e98a9 100644 (file)
                        resets = <&cpg R9A08G045_GPIO_RSTN>,
                                 <&cpg R9A08G045_GPIO_PORT_RESETN>,
                                 <&cpg R9A08G045_GPIO_SPARE_RESETN>;
+                       reset-names = "rstn", "port", "spare";
                };
 
                irqc: interrupt-controller@11050000 {
index 95a4e30a064d184c6b99309e2ac25b7ad4b0394a..4267b10937f3f7a8a36d2d4090efe653d6054493 100644 (file)
                        interrupt-parent = <&icu>;
                        power-domains = <&cpg>;
                        resets = <&cpg 0xa5>, <&cpg 0xa6>;
+                       reset-names = "main", "error";
                };
 
                cpg: clock-controller@10420000 {
index 7ccddd6a4a9ad8bf4d1307588c7f3d24b2c13f53..dc5b116679c0caacfd5a66a960741df7f0c94d38 100644 (file)
                        gpio-ranges = <&pinctrl 0 0 96>;
                        power-domains = <&cpg>;
                        resets = <&cpg 0xa5>, <&cpg 0xa6>;
+                       reset-names = "main", "error";
                };
 
                cpg: clock-controller@10420000 {
index 6f6fe5f36bef3878b5550d2daf4adf91247643cc..1e94366bb7eeeb48f23efd2c6bbdc652d1fa648d 100644 (file)
                        interrupt-parent = <&icu>;
                        power-domains = <&cpg>;
                        resets = <&cpg 0xa5>, <&cpg 0xa6>;
+                       reset-names = "main", "error";
                };
 
                cpg: clock-controller@10420000 {