FWCfgState *fw_cfg;
char *nodename;
- fw_cfg = fw_cfg_init_mem_wide(base + 8, base, 8, base + 16, as);
+ fw_cfg = fw_cfg_init_mem_dma(base + 8, base, 8, base + 16, as);
fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, (uint16_t)ms->smp.cpus);
nodename = g_strdup_printf("/fw-cfg@%" PRIx64, base);
int max_cpus = ms->smp.max_cpus;
int smp_cpus = ms->smp.cpus;
- fw_cfg = fw_cfg_init_mem_wide(VIRT_FWCFG_BASE + 8, VIRT_FWCFG_BASE, 8,
- VIRT_FWCFG_BASE + 16, &address_space_memory);
+ fw_cfg = fw_cfg_init_mem_dma(VIRT_FWCFG_BASE + 8, VIRT_FWCFG_BASE, 8,
+ VIRT_FWCFG_BASE + 16, &address_space_memory);
fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)max_cpus);
fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, (uint16_t)smp_cpus);
return s;
}
-FWCfgState *fw_cfg_init_mem_wide(hwaddr ctl_addr,
- hwaddr data_addr, uint32_t data_width,
- hwaddr dma_addr, AddressSpace *dma_as)
+FWCfgState *fw_cfg_init_mem_dma(hwaddr ctl_addr,
+ hwaddr data_addr, uint32_t data_width,
+ hwaddr dma_addr, AddressSpace *dma_as)
{
assert(dma_addr && dma_as);
return fw_cfg_init_mem_internal(ctl_addr, data_addr, data_width,
{
FWCfgState *fw_cfg;
- fw_cfg = fw_cfg_init_mem_wide(base + 8, base, 8, base + 16,
- &address_space_memory);
+ fw_cfg = fw_cfg_init_mem_dma(base + 8, base, 8, base + 16,
+ &address_space_memory);
fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, (uint16_t)ms->smp.cpus);
return fw_cfg;
AddressSpace *dma_as);
FWCfgState *fw_cfg_init_mem_nodma(hwaddr ctl_addr, hwaddr data_addr,
unsigned data_width);
-FWCfgState *fw_cfg_init_mem_wide(hwaddr ctl_addr,
- hwaddr data_addr, uint32_t data_width,
- hwaddr dma_addr, AddressSpace *dma_as);
+FWCfgState *fw_cfg_init_mem_dma(hwaddr ctl_addr,
+ hwaddr data_addr, uint32_t data_width,
+ hwaddr dma_addr, AddressSpace *dma_as);
FWCfgState *fw_cfg_find(void);
bool fw_cfg_dma_enabled(void *opaque);