x86/CPU/AMD: Properly check the TSA microcode

In order to simplify backports, I resorted to an older version of the
microcode revision checking which didn't pull in the whole struct
x86_cpu_id matching machinery.

My simpler method, however, forgot to add the extended CPU model to the
patch revision, which lead to mismatches when determining whether TSA
mitigation support is present.

So add that forgotten extended model.

Also, fix a backport mismerge which put tsa_init() where it doesn't
belong.

This is a stable-only fix and the preference is to do it this way
because it is a lot simpler. Also, the Fixes: tag below points to the
respective stable patch.

Fixes: 90293047df18 ("x86/bugs: Add a Transient Scheduler Attacks mitigation")
Reported-by: Thomas Voegtle <tv@lio96.de>
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Message-ID: <04ea0a8e-edb0-c59e-ce21-5f3d5d167af3@lio96.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
index 3e3679709e903222c79c4a588b5d49b8cb1ff46e..4785d41558d61b3f4a93b14d6809a1b2df7918c0 100644 (file)
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -561,6 +561,7 @@ static bool amd_check_tsa_microcode(void)
 
        p.ext_fam       = c->x86 - 0xf;
        p.model         = c->x86_model;
+       p.ext_model     = c->x86_model >> 4;
        p.stepping      = c->x86_stepping;
 
        if (c->x86 == 0x19) {
@@ -675,6 +676,8 @@ static void bsp_init_amd(struct cpuinfo_x86 *c)
        }
 
        resctrl_cpu_detect(c);
+
+       tsa_init(c);
 }
 
 static void early_detect_mem_encrypt(struct cpuinfo_x86 *c)
@@ -719,8 +722,6 @@ static void early_detect_mem_encrypt(struct cpuinfo_x86 *c)
                        goto clear_sev;
 
 
-       tsa_init(c);
-
                return;
 
 clear_all: