arm64: dts: imx943-evk: Add pcie[0,1] and pcie-ep[0,1] support

Add pcie[0,1] and pcie-ep[0,1] support.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Frank Li <Frank.Li@nxp.com>

diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
index d8378ae0709391c26cc5537c187fd9bca417af0a..48fbf9c33b65fb321a30fd3306ca9157b7338160 100644 (file)
--- a/arch/arm64/boot/dts/freescale/Makefile
+++ b/arch/arm64/boot/dts/freescale/Makefile
@@ -509,6 +509,11 @@ dtb-$(CONFIG_ARCH_MXC) += imx93-var-dart-sonata.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx93-var-som-symphony.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx93w-evk.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx943-evk.dtb
+
+imx943-evk-pcie0-ep-dtbs += imx943-evk.dtb imx-pcie0-ep.dtbo
+imx943-evk-pcie1-ep-dtbs += imx943-evk.dtb imx-pcie1-ep.dtbo
+dtb-$(CONFIG_ARCH_MXC) += imx943-evk-pcie0-ep.dtb imx943-evk-pcie1-ep.dtb
+
 dtb-$(CONFIG_ARCH_MXC) += imx95-15x15-ab2.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx95-15x15-evk.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx95-15x15-frdm.dtb

diff --git a/arch/arm64/boot/dts/freescale/imx943-evk.dts b/arch/arm64/boot/dts/freescale/imx943-evk.dts
index 52f7ef7dbf2722e838ba7f005c2396c30cb005ac..fe4fc512d95d4db3c104b92ba233d64de36c77a3 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx943-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx943-evk.dts
@@ -58,6 +58,20 @@
                stdout-path = &lpuart1;
        };
 
+       pcie_ref_clk: clock-pcie-ref {
+               compatible = "gpio-gate-clock";
+               clocks = <&xtal25m>;
+               #clock-cells = <0>;
+               enable-gpios = <&pca9670_i2c3 7 GPIO_ACTIVE_LOW>;
+       };
+
+       xtal25m: clock-xtal25m {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <25000000>;
+               clock-output-names = "xtal_25MHz";
+       };
+
        dmic: dmic {
                compatible = "dmic-codec";
                #sound-dai-cells = <0>;
@@ -79,6 +93,15 @@
                startup-delay-us = <5000>;
        };
 
+       reg_slot_pwr: regulator-slot-pwr {
+               compatible = "regulator-fixed";
+               regulator-name = "PCIe slot-power";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+               gpio = <&pcal6416_i2c3_u46 0 GPIO_ACTIVE_HIGH>;
+               enable-active-high;
+       };
+
        reg_m2_wlan: regulator-wlan {
                compatible = "regulator-fixed";
                regulator-name = "WLAN_EN";
@@ -725,6 +748,18 @@
                >;
        };
 
+       pinctrl_pcie0: pcie0grp {
+               fsl,pins = <
+                       IMX94_PAD_GPIO_IO20__PCIE1_CLKREQ_B     0x4000031e
+               >;
+       };
+
+       pinctrl_pcie1: pcie1grp {
+               fsl,pins = <
+                       IMX94_PAD_GPIO_IO23__PCIE2_CLKREQ_B     0x4000031e
+               >;
+       };
+
        pinctrl_pdm: pdmgrp {
                fsl,pins = <
                        IMX94_PAD_PDM_CLK__PDM_CLK                      0x31e
@@ -988,6 +1023,54 @@
        };
 };
 
+&pcie0 {
+       pinctrl-0 = <&pinctrl_pcie0>;
+       pinctrl-names = "default";
+       clocks = <&scmi_clk IMX94_CLK_HSIO>,
+                <&scmi_clk IMX94_CLK_HSIOPLL>,
+                <&scmi_clk IMX94_CLK_HSIOPLL_VCO>,
+                <&scmi_clk IMX94_CLK_HSIOPCIEAUX>,
+                <&hsio_blk_ctl 0>,
+                <&pcie_ref_clk>;
+       clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_aux",
+                     "ref", "extref";
+       reset-gpio = <&pcal6416_i2c3_u46 3 GPIO_ACTIVE_LOW>;
+       vpcie3v3aux-supply = <&reg_m2_wlan>;
+       supports-clkreq;
+       status = "okay";
+};
+
+&pcie0_ep {
+       pinctrl-0 = <&pinctrl_pcie0>;
+       pinctrl-names = "default";
+       vpcie-supply = <&reg_m2_wlan>;
+       status = "disabled";
+};
+
+&pcie1 {
+       pinctrl-0 = <&pinctrl_pcie1>;
+       pinctrl-names = "default";
+       clocks = <&scmi_clk IMX94_CLK_HSIO>,
+                <&scmi_clk IMX94_CLK_HSIOPLL>,
+                <&scmi_clk IMX94_CLK_HSIOPLL_VCO>,
+                <&scmi_clk IMX94_CLK_HSIOPCIEAUX>,
+                <&hsio_blk_ctl 0>,
+                <&pcie_ref_clk>;
+       clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_aux",
+                     "ref", "extref";
+       reset-gpio = <&pcal6416_i2c3_u46 1 GPIO_ACTIVE_LOW>;
+       vpcie3v3aux-supply = <&reg_slot_pwr>;
+       supports-clkreq;
+       status = "okay";
+};
+
+&pcie1_ep {
+       pinctrl-0 = <&pinctrl_pcie1>;
+       pinctrl-names = "default";
+       vpcie-supply = <&reg_slot_pwr>;
+       status = "disabled";
+};
+
 &usb2 {
        dr_mode = "otg";
        disable-over-current;