*
*/
+FILE_LICENCE ( GPL2_OR_LATER );
+
#define UACCESS_EFI
#define IOAPI_X86
#define PCIAPI_EFI
*
*/
+FILE_LICENCE ( GPL2_OR_LATER );
+
#define CONSOLE_LINUX
#define TIMER_LINUX
#define UACCESS_LINUX
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
+FILE_LICENCE ( BSD2 );
+
static const u32 ar5416Modes[][6] = {
{0x00001030, 0x00000230, 0x00000460, 0x000002c0, 0x00000160, 0x000001e0},
{0x00001070, 0x00000168, 0x000002d0, 0x00000318, 0x0000018c, 0x000001e0},
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
+FILE_LICENCE ( BSD2 );
+
static const u32 ar5416Modes_9100[][6] = {
{0x00001030, 0x00000230, 0x00000460, 0x000002c0, 0x00000160, 0x000001e0},
{0x00001070, 0x00000168, 0x000002d0, 0x00000318, 0x0000018c, 0x000001e0},
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
+FILE_LICENCE ( BSD2 );
+
static const u32 ar9280Modes_9280_2[][6] = {
{0x00001030, 0x00000230, 0x00000460, 0x000002c0, 0x00000160, 0x000001e0},
{0x00001070, 0x00000168, 0x000002d0, 0x00000318, 0x0000018c, 0x000001e0},
#ifndef AR9002_PHY_H
#define AR9002_PHY_H
+FILE_LICENCE ( BSD2 );
+
#define AR_PHY_TEST 0x9800
#define PHY_AGC_CLR 0x10000000
#define RFSILENT_BB 0x00002000
#ifndef ATH9K_HW_OPS_H
#define ATH9K_HW_OPS_H
+FILE_LICENCE ( BSD2 );
+
#include "hw.h"
/* Hardware core and driver accessible callbacks */
#ifndef PHY_H
#define PHY_H
+FILE_LICENCE ( BSD2 );
+
#define CHANSEL_DIV 15
#define CHANSEL_2G(_freq) (((_freq) * 0x10000) / CHANSEL_DIV)
#define CHANSEL_5G(_freq) (((_freq) * 0x8000) / CHANSEL_DIV)
#ifndef REG_H
#define REG_H
+FILE_LICENCE ( BSD2 );
+
#include "../reg.h"
#define AR_CR 0x0008
#ifndef _IPXE_EFI_PROCESSOR_BIND_H
#define _IPXE_EFI_PROCESSOR_BIND_H
+FILE_LICENCE ( GPL2_OR_LATER );
+
/*
* EFI header files rely on having the CPU architecture directory
* present in the search path in order to pick up ProcessorBind.h. We
* trailing whitespace.
*/
+FILE_LICENCE ( GPL2_OR_LATER );
+
/* EFI headers rudely redefine NULL */
#undef NULL