CPUIDLEVEL(TRUE, 821, 0x80000021, 0, 17) \
CPUIDLEVEL(TRUE, 822, 0x80000022, 0, 20) \
CPUIDLEVEL(TRUE, 823, 0x80000023, 0, 20) \
- CPUIDLEVEL(TRUE, 826, 0x80000026, 4, 20)
+ CPUIDLEVEL(FALSE, 826, 0x80000026, 4, 20)
#define CPUID_ALL_LEVELS CPUID_CACHED_LEVELS
#define CPUID_AMD_LEAF81D_CACHE_TYPE_INST 2
#define CPUID_AMD_LEAF81D_CACHE_TYPE_UNIF 3
+#define CPUID_AMD_TOPOLOGY_LEVEL_TYPE_INVALID 0
+#define CPUID_AMD_TOPOLOGY_LEVEL_TYPE_CORE 1
+#define CPUID_AMD_TOPOLOGY_LEVEL_TYPE_COMPLEX 2
+#define CPUID_AMD_TOPOLOGY_LEVEL_TYPE_CCD 3
+#define CPUID_AMD_TOPOLOGY_LEVEL_TYPE_SOCKET 4
+
/*
* For certain AMD processors, an lfence instruction is necessary at various
* places to ensure ordering.