MIPS: Support constraint 'w' for MSA instruction

Support syntax like:
	asm volatile ("fmadd.d %w0, %w1, %w2" : "+w"(a): "w"(b), "w"(c));

gcc
	* config/mips/constraints.md: Add new constraint 'w'.

gcc/testsuite
	* gcc.target/mips/msa-inline-asm.c: New test.

diff --git a/gcc/config/mips/constraints.md b/gcc/config/mips/constraints.md
index a96028dd746065a079ffff0feb9b7b9ffdeb3959..f5c8817903827cb3400137b3da34f6772f0b98b3 100644 (file)
--- a/gcc/config/mips/constraints.md
+++ b/gcc/config/mips/constraints.md
@@ -29,6 +29,9 @@
 (define_register_constraint "f" "TARGET_HARD_FLOAT ? FP_REGS : NO_REGS"
   "A floating-point register (if available).")
 
+(define_register_constraint "w" "ISA_HAS_MSA ? FP_REGS : NO_REGS"
+  "A MIPS SIMD register (if available).")
+
 (define_register_constraint "h" "NO_REGS"
   "Formerly the @code{hi} register.  This constraint is no longer supported.")
 

diff --git a/gcc/testsuite/gcc.target/mips/msa-inline-asm.c b/gcc/testsuite/gcc.target/mips/msa-inline-asm.c
new file mode 100644 (file)
index 0000000..bdf6816
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/msa-inline-asm.c
@@ -0,0 +1,9 @@
+/* { dg-do compile } */
+/* { dg-options "-mno-mips16 -mfp64 -mhard-float -mmsa" } */
+
+double
+f(double a, double b, double c) {
+  asm volatile ("fmadd.d %w0, %w1, %w2" : "+w"(a): "w"(b), "w"(c));
+  return a;
+}
+/* { dg-final { scan-assembler "fmadd.d \\\$w0, \\\$w\[0-9\]*, \\\$w\[0-9\]*" } }  */