RDMA/bnxt_re: Add support for CQ rx coalescing

RoCE message rate performance is heavily degraded
without the use of cq coalescing. With proper coalescing,
message rates get better. Furthermore, coalescing
significantly reduces contention on the PCIe Root
Complex/Memory subsystems.

Add the changes to configure CQ rx colascing parameters
based on adapter revision when CQ is created.

Signed-off-by: Chandramohan Akula <chandramohan.akula@broadcom.com>
Signed-off-by: Kalesh AP <kalesh-anakkur.purayil@broadcom.com>
Signed-off-by: Selvin Xavier <selvin.xavier@broadcom.com>
Link: https://patch.msgid.link/1729065346-1364-4-git-send-email-selvin.xavier@broadcom.com
Signed-off-by: Leon Romanovsky <leon@kernel.org>

diff --git a/drivers/infiniband/hw/bnxt_re/bnxt_re.h b/drivers/infiniband/hw/bnxt_re/bnxt_re.h
index e94518b12f86ee1d8eb9650d96330f7dfc5573a8..bb28a1fe1430cf627913c60157b1b1669c131767 100644 (file)
--- a/drivers/infiniband/hw/bnxt_re/bnxt_re.h
+++ b/drivers/infiniband/hw/bnxt_re/bnxt_re.h
@@ -156,6 +156,13 @@ struct bnxt_re_pacing {
 
 #define MAX_CQ_HASH_BITS               (16)
 #define MAX_SRQ_HASH_BITS              (16)
+
+static inline bool bnxt_re_chip_gen_p7(u16 chip_num)
+{
+       return (chip_num == CHIP_NUM_58818 ||
+               chip_num == CHIP_NUM_57608);
+}
+
 struct bnxt_re_dev {
        struct ib_device                ibdev;
        struct list_head                list;
@@ -195,6 +202,7 @@ struct bnxt_re_dev {
        struct bnxt_qplib_ctx           qplib_ctx;
        struct bnxt_qplib_res           qplib_res;
        struct bnxt_qplib_dpi           dpi_privileged;
+       struct bnxt_qplib_cq_coal_param cq_coalescing;
 
        struct mutex                    qp_lock;        /* protect qp list */
        struct list_head                qp_list;

diff --git a/drivers/infiniband/hw/bnxt_re/ib_verbs.c b/drivers/infiniband/hw/bnxt_re/ib_verbs.c
index 460f33914825c6865cd8e4b4b559f94cacb71653..55a3cc8aaf96893dab888a9080d8e3691fbc2d93 100644 (file)
--- a/drivers/infiniband/hw/bnxt_re/ib_verbs.c
+++ b/drivers/infiniband/hw/bnxt_re/ib_verbs.c
@@ -3065,6 +3065,7 @@ int bnxt_re_create_cq(struct ib_cq *ibcq, const struct ib_cq_init_attr *attr,
        cq->qplib_cq.max_wqe = entries;
        cq->qplib_cq.cnq_hw_ring_id = nq->ring_id;
        cq->qplib_cq.nq = nq;
+       cq->qplib_cq.coalescing = &rdev->cq_coalescing;
 
        rc = bnxt_qplib_create_cq(&rdev->qplib_res, &cq->qplib_cq);
        if (rc) {

diff --git a/drivers/infiniband/hw/bnxt_re/main.c b/drivers/infiniband/hw/bnxt_re/main.c
index 777068de4bbc170de47d214d05112c14901805d2..3a0181843dba7e79a592cf1c9fffdeffdb865c71 100644 (file)
--- a/drivers/infiniband/hw/bnxt_re/main.c
+++ b/drivers/infiniband/hw/bnxt_re/main.c
@@ -986,6 +986,15 @@ static struct bnxt_re_dev *bnxt_re_dev_add(struct bnxt_aux_priv *aux_priv,
        atomic_set(&rdev->stats.res.pd_count, 0);
        rdev->cosq[0] = 0xFFFF;
        rdev->cosq[1] = 0xFFFF;
+       rdev->cq_coalescing.buf_maxtime = BNXT_QPLIB_CQ_COAL_DEF_BUF_MAXTIME;
+       if (bnxt_re_chip_gen_p7(en_dev->chip_num)) {
+               rdev->cq_coalescing.normal_maxbuf = BNXT_QPLIB_CQ_COAL_DEF_NORMAL_MAXBUF_P7;
+               rdev->cq_coalescing.during_maxbuf = BNXT_QPLIB_CQ_COAL_DEF_DURING_MAXBUF_P7;
+       } else {
+               rdev->cq_coalescing.normal_maxbuf = BNXT_QPLIB_CQ_COAL_DEF_NORMAL_MAXBUF_P5;
+               rdev->cq_coalescing.during_maxbuf = BNXT_QPLIB_CQ_COAL_DEF_DURING_MAXBUF_P5;
+       }
+       rdev->cq_coalescing.en_ring_idle_mode = BNXT_QPLIB_CQ_COAL_DEF_EN_RING_IDLE_MODE;
 
        return rdev;
 }

diff --git a/drivers/infiniband/hw/bnxt_re/qplib_fp.c b/drivers/infiniband/hw/bnxt_re/qplib_fp.c
index ff2340c59fc16cd2b38602029c5c78928f7fa630..e2eea714e9776bccfb55e56d4e7dfb7526a57609 100644 (file)
--- a/drivers/infiniband/hw/bnxt_re/qplib_fp.c
+++ b/drivers/infiniband/hw/bnxt_re/qplib_fp.c
@@ -2182,6 +2182,7 @@ int bnxt_qplib_create_cq(struct bnxt_qplib_res *res, struct bnxt_qplib_cq *cq)
        struct bnxt_qplib_cmdqmsg msg = {};
        struct cmdq_create_cq req = {};
        struct bnxt_qplib_pbl *pbl;
+       u32 coalescing = 0;
        u32 pg_sz_lvl;
        int rc;
 
@@ -2208,6 +2209,25 @@ int bnxt_qplib_create_cq(struct bnxt_qplib_res *res, struct bnxt_qplib_cq *cq)
        req.dpi = cpu_to_le32(cq->dpi->dpi);
        req.cq_handle = cpu_to_le64(cq->cq_handle);
        req.cq_size = cpu_to_le32(cq->max_wqe);
+
+       if (_is_cq_coalescing_supported(res->dattr->dev_cap_flags2)) {
+               req.flags |= cpu_to_le16(CMDQ_CREATE_CQ_FLAGS_COALESCING_VALID);
+               coalescing |= ((cq->coalescing->buf_maxtime <<
+                               CMDQ_CREATE_CQ_BUF_MAXTIME_SFT) &
+                              CMDQ_CREATE_CQ_BUF_MAXTIME_MASK);
+               coalescing |= ((cq->coalescing->normal_maxbuf <<
+                               CMDQ_CREATE_CQ_NORMAL_MAXBUF_SFT) &
+                              CMDQ_CREATE_CQ_NORMAL_MAXBUF_MASK);
+               coalescing |= ((cq->coalescing->during_maxbuf <<
+                               CMDQ_CREATE_CQ_DURING_MAXBUF_SFT) &
+                              CMDQ_CREATE_CQ_DURING_MAXBUF_MASK);
+               if (cq->coalescing->en_ring_idle_mode)
+                       coalescing |= CMDQ_CREATE_CQ_ENABLE_RING_IDLE_MODE;
+               else
+                       coalescing &= ~CMDQ_CREATE_CQ_ENABLE_RING_IDLE_MODE;
+               req.coalescing = cpu_to_le32(coalescing);
+       }
+
        pbl = &cq->hwq.pbl[PBL_LVL_0];
        pg_sz_lvl = (bnxt_qplib_base_pg_size(&cq->hwq) <<
                     CMDQ_CREATE_CQ_PG_SIZE_SFT);

diff --git a/drivers/infiniband/hw/bnxt_re/qplib_fp.h b/drivers/infiniband/hw/bnxt_re/qplib_fp.h
index b62df8701950ff622309fb5840ab16189cebf1b9..fb01576e545d2ba4416d2c733716b0cdad48f983 100644 (file)
--- a/drivers/infiniband/hw/bnxt_re/qplib_fp.h
+++ b/drivers/infiniband/hw/bnxt_re/qplib_fp.h
@@ -383,6 +383,25 @@ static inline bool bnxt_qplib_queue_full(struct bnxt_qplib_q *que,
        return avail <= slots;
 }
 
+/* CQ coalescing parameters */
+struct bnxt_qplib_cq_coal_param {
+       u16 buf_maxtime;
+       u8 normal_maxbuf;
+       u8 during_maxbuf;
+       u8 en_ring_idle_mode;
+};
+
+#define BNXT_QPLIB_CQ_COAL_DEF_BUF_MAXTIME             0x1
+#define BNXT_QPLIB_CQ_COAL_DEF_NORMAL_MAXBUF_P7                0x8
+#define BNXT_QPLIB_CQ_COAL_DEF_DURING_MAXBUF_P7                0x8
+#define BNXT_QPLIB_CQ_COAL_DEF_NORMAL_MAXBUF_P5                0x1
+#define BNXT_QPLIB_CQ_COAL_DEF_DURING_MAXBUF_P5                0x1
+#define BNXT_QPLIB_CQ_COAL_DEF_EN_RING_IDLE_MODE       0x1
+#define BNXT_QPLIB_CQ_COAL_MAX_BUF_MAXTIME             0x1bf
+#define BNXT_QPLIB_CQ_COAL_MAX_NORMAL_MAXBUF           0x1f
+#define BNXT_QPLIB_CQ_COAL_MAX_DURING_MAXBUF           0x1f
+#define BNXT_QPLIB_CQ_COAL_MAX_EN_RING_IDLE_MODE       0x1
+
 struct bnxt_qplib_cqe {
        u8                              status;
        u8                              type;
@@ -445,6 +464,7 @@ struct bnxt_qplib_cq {
  */
        spinlock_t                      flush_lock; /* QP flush management */
        u16                             cnq_events;
+       struct bnxt_qplib_cq_coal_param *coalescing;
 };
 
 #define BNXT_QPLIB_MAX_IRRQE_ENTRY_SIZE        sizeof(struct xrrq_irrq)

diff --git a/drivers/infiniband/hw/bnxt_re/qplib_res.h b/drivers/infiniband/hw/bnxt_re/qplib_res.h
index ef198a6fc85ac6f91b64153072e66558e49caed8..115910c7e56dcf8927463f5128721930f0e86a26 100644 (file)
--- a/drivers/infiniband/hw/bnxt_re/qplib_res.h
+++ b/drivers/infiniband/hw/bnxt_re/qplib_res.h
@@ -581,4 +581,9 @@ static inline bool _is_optimize_modify_qp_supported(u16 dev_cap_ext_flags2)
        return dev_cap_ext_flags2 & CREQ_QUERY_FUNC_RESP_SB_OPTIMIZE_MODIFY_QP_SUPPORTED;
 }
 
+static inline bool _is_cq_coalescing_supported(u16 dev_cap_ext_flags2)
+{
+       return dev_cap_ext_flags2 & CREQ_QUERY_FUNC_RESP_SB_CQ_COALESCING_SUPPORTED;
+}
+
 #endif /* __BNXT_QPLIB_RES_H__ */

diff --git a/drivers/infiniband/hw/bnxt_re/roce_hsi.h b/drivers/infiniband/hw/bnxt_re/roce_hsi.h
index 492417eb5896e68a8e699d21275f1bd095c4dd76..a7679eedbf271567e731b1fb8e47788491464489 100644 (file)
--- a/drivers/infiniband/hw/bnxt_re/roce_hsi.h
+++ b/drivers/infiniband/hw/bnxt_re/roce_hsi.h
@@ -1139,6 +1139,7 @@ struct cmdq_create_cq {
        #define CMDQ_CREATE_CQ_FLAGS_DISABLE_CQ_OVERFLOW_DETECTION     0x1UL
        #define CMDQ_CREATE_CQ_FLAGS_STEERING_TAG_VALID                0x2UL
        #define CMDQ_CREATE_CQ_FLAGS_INFINITE_CQ_MODE                  0x4UL
+       #define CMDQ_CREATE_CQ_FLAGS_COALESCING_VALID                  0x8UL
        __le16  cookie;
        u8      resp_size;
        u8      reserved8;
@@ -1171,7 +1172,18 @@ struct cmdq_create_cq {
        __le32  cq_size;
        __le64  pbl;
        __le16  steering_tag;
-       u8      reserved48[6];
+       u8      reserved48[2];
+       __le32  coalescing;
+       #define CMDQ_CREATE_CQ_BUF_MAXTIME_MASK          0x1ffUL
+       #define CMDQ_CREATE_CQ_BUF_MAXTIME_SFT           0
+       #define CMDQ_CREATE_CQ_NORMAL_MAXBUF_MASK        0x3e00UL
+       #define CMDQ_CREATE_CQ_NORMAL_MAXBUF_SFT         9
+       #define CMDQ_CREATE_CQ_DURING_MAXBUF_MASK        0x7c000UL
+       #define CMDQ_CREATE_CQ_DURING_MAXBUF_SFT         14
+       #define CMDQ_CREATE_CQ_ENABLE_RING_IDLE_MODE     0x80000UL
+       #define CMDQ_CREATE_CQ_UNUSED12_MASK             0xfff00000UL
+       #define CMDQ_CREATE_CQ_UNUSED12_SFT              20
+       __le64  reserved64;
 };
 
 /* creq_create_cq_resp (size:128b/16B) */