]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
arm64: dts: imx8mp-venice-gw702x: remove off-board sdhc1
authorTim Harvey <tharvey@gateworks.com>
Thu, 18 Sep 2025 15:44:51 +0000 (08:44 -0700)
committerShawn Guo <shawnguo@kernel.org>
Tue, 21 Oct 2025 08:29:40 +0000 (16:29 +0800)
SDHC1 on the GW702x SOM routes to a connector for use on a baseboard
and as such are defined in the baseboard device-trees.

Remove it from the gw702x SOM device-tree.

Fixes: 0d5b288c2110 ("arm64: dts: freescale: Add imx8mp-venice-gw7905-2x")
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
arch/arm64/boot/dts/freescale/imx8mp-venice-gw702x.dtsi
arch/arm64/boot/dts/freescale/imx8mp-venice-gw72xx.dtsi

index dba35b3394bc8b6bc4a191bf0c596dbda41c1a6d..de852ebff57128394c1dde5c68a5f9e37dfb8f4e 100644 (file)
        status = "okay";
 };
 
-/* off-board */
-&usdhc1 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_usdhc1>;
-       bus-width = <4>;
-       non-removable;
-       status = "okay";
-};
-
 /* eMMC */
 &usdhc3 {
        pinctrl-names = "default", "state_100mhz", "state_200mhz";
                >;
        };
 
-       pinctrl_usdhc1: usdhc1grp {
-               fsl,pins = <
-                       MX8MP_IOMUXC_SD1_CLK__USDHC1_CLK        0x190
-                       MX8MP_IOMUXC_SD1_CMD__USDHC1_CMD        0x1d0
-                       MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0    0x1d0
-                       MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1    0x1d0
-                       MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2    0x1d0
-                       MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3    0x1d0
-               >;
-       };
-
        pinctrl_usdhc3: usdhc3grp {
                fsl,pins = <
                        MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK      0x190
index cf747ec6fa16ebf7e9df764705355709612eeb28..76020ef89bf3e8b4533aae06fb73d943e3388a90 100644 (file)
                >;
        };
 
-       pinctrl_usdhc1: usdhc1grp {
-               fsl,pins = <
-                       MX8MP_IOMUXC_SD1_CLK__USDHC1_CLK        0x190
-                       MX8MP_IOMUXC_SD1_CMD__USDHC1_CMD        0x1d0
-                       MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0    0x1d0
-                       MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1    0x1d0
-                       MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2    0x1d0
-                       MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3    0x1d0
-               >;
-       };
-
        pinctrl_usdhc2: usdhc2grp {
                fsl,pins = <
                        MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK        0x190