]> git.ipfire.org Git - thirdparty/valgrind.git/commitdiff
Introduce HInstrSB into VEX backend headers.
authorIvo Raisr <ivosh@ivosh.net>
Tue, 8 Aug 2017 05:03:04 +0000 (07:03 +0200)
committerIvo Raisr <ivosh@ivosh.net>
Tue, 15 Aug 2017 09:49:08 +0000 (11:49 +0200)
VEX/priv/host_amd64_defs.h
VEX/priv/host_arm64_defs.h
VEX/priv/host_arm_defs.h
VEX/priv/host_mips_defs.h
VEX/priv/host_ppc_defs.h
VEX/priv/host_s390_defs.h
VEX/priv/host_x86_defs.c
VEX/priv/host_x86_defs.h

index 39682ef9c41057ce00e3cd1ad00dce18be6ddcae..e41fe34b55d32767ca1a65d88d369dd114b1b355 100644 (file)
@@ -807,7 +807,7 @@ extern AMD64Instr* directReload_AMD64 ( AMD64Instr* i,
 
 extern const RRegUniverse* getRRegUniverse_AMD64 ( void );
 
-extern HInstrArray* iselSB_AMD64           ( const IRSB*, 
+extern HInstrSB* iselSB_AMD64              ( const IRSB*,
                                              VexArch,
                                              const VexArchInfo*,
                                              const VexAbiInfo*,
index 14b2de6a41b5e5d2883c313d783fc24351f40aab..bbc211d453c64fdf535457afae4facc62826c83e 100644 (file)
@@ -1010,7 +1010,7 @@ extern void genReload_ARM64 ( /*OUT*/HInstr** i1, /*OUT*/HInstr** i2,
 
 extern const RRegUniverse* getRRegUniverse_ARM64 ( void );
 
-extern HInstrArray* iselSB_ARM64 ( const IRSB*, 
+extern HInstrSB* iselSB_ARM64    ( const IRSB*,
                                    VexArch,
                                    const VexArchInfo*,
                                    const VexAbiInfo*,
index e8a2eb72376726fd8b1529e45cbaefba9d25a3e0..19c429993f06e60d1f03fa854e8aecd33fc80210 100644 (file)
@@ -1073,7 +1073,7 @@ extern void genReload_ARM ( /*OUT*/HInstr** i1, /*OUT*/HInstr** i2,
 
 extern const RRegUniverse* getRRegUniverse_ARM ( void );
 
-extern HInstrArray* iselSB_ARM   ( const IRSB*, 
+extern HInstrSB* iselSB_ARM      ( const IRSB*,
                                    VexArch,
                                    const VexArchInfo*,
                                    const VexAbiInfo*,
index 481a4878cf58f8b2e0a47df066de2417dfead641..11bea76c119a80e61375cade712fd0f72dc45021 100644 (file)
@@ -703,7 +703,7 @@ extern void genReload_MIPS( /*OUT*/ HInstr ** i1, /*OUT*/ HInstr ** i2,
 
 extern const RRegUniverse* getRRegUniverse_MIPS ( Bool mode64 );
 
-extern HInstrArray *iselSB_MIPS          ( const IRSB*,
+extern HInstrSB *iselSB_MIPS             ( const IRSB*,
                                            VexArch,
                                            const VexArchInfo*,
                                            const VexAbiInfo*,
index 62c15ae86546941b9ba3348687b2aa9d10d7b1dd..9a9187ddf1de3e354af57c54b4c0ae75085b04f0 100644 (file)
@@ -1218,7 +1218,7 @@ extern void genReload_PPC ( /*OUT*/HInstr** i1, /*OUT*/HInstr** i2,
 
 extern const RRegUniverse* getRRegUniverse_PPC ( Bool mode64 );
 
-extern HInstrArray* iselSB_PPC           ( const IRSB*,
+extern HInstrSB* iselSB_PPC              ( const IRSB*,
                                            VexArch,
                                            const VexArchInfo*,
                                            const VexAbiInfo*,
index 202690022f9ae9d00fa7e3056afaf66bccb8253b..75a0a4484c482f93238ef421cf40d6aec9316d07 100644 (file)
@@ -749,7 +749,7 @@ Int   emit_S390Instr       ( Bool *, UChar *, Int, const s390_insn *, Bool,
 const RRegUniverse *getRRegUniverse_S390( void );
 void  genSpill_S390        ( HInstr **, HInstr **, HReg , Int , Bool );
 void  genReload_S390       ( HInstr **, HInstr **, HReg , Int , Bool );
-HInstrArray *iselSB_S390   ( const IRSB *, VexArch, const VexArchInfo *,
+HInstrSB *iselSB_S390      ( const IRSB *, VexArch, const VexArchInfo *,
                              const VexAbiInfo *, Int, Int, Bool, Bool, Addr);
 
 /* Return the number of bytes of code needed for an event check */
index 956e3234d75a5c1a733f9e8b14f44c77d1b1da90..ac2225c6dca3d95cb3ec6eb6211d4d0734a514ce 100644 (file)
@@ -922,6 +922,13 @@ X86Instr* X86Instr_ProfInc ( void ) {
    i->tag      = Xin_ProfInc;
    return i;
 }
+X86Instr* X86Instr_IfThenElse(HInstrIfThenElse* hite)
+{
+   X86Instr* i            = LibVEX_Alloc_inline(sizeof(X86Instr));
+   i->tag                 = Xin_IfThenElse;
+   i->Xin.IfThenElse.hite = hite;
+   return i;
+}
 
 void ppX86Instr ( const X86Instr* i, Bool mode64 ) {
    vassert(mode64 == False);
@@ -1212,11 +1219,20 @@ void ppX86Instr ( const X86Instr* i, Bool mode64 ) {
          vex_printf("(profInc) addl $1,NotKnownYet; "
                     "adcl $0,NotKnownYet+4");
          return;
+      case Xin_IfThenElse:
+         vex_printf("if (!%s) then {...",
+                    showX86CondCode(i->Xin.IfThenElse.hite->ccOOL));
+         return;
       default:
          vpanic("ppX86Instr");
    }
 }
 
+void ppX86CondCode(X86CondCode condCode)
+{
+   vex_printf("%s", showX86CondCode(condCode));
+}
+
 /* --------- Helpers for register allocation. --------- */
 
 void getRegUsage_X86Instr (HRegUsage* u, const X86Instr* i, Bool mode64)
@@ -1697,6 +1713,13 @@ Bool isMove_X86Instr ( const X86Instr* i, HReg* src, HReg* dst )
    return False;
 }
 
+extern HInstrIfThenElse* isIfThenElse_X86Instr(X86Instr* i)
+{
+   if (UNLIKELY(i->tag == Xin_IfThenElse)) {
+      return i->Xin.IfThenElse.hite;
+   }
+   return NULL;
+}
 
 /* Generate x86 spill/reload instructions under the direction of the
    register allocator.  Note it's critical these don't write the
index 0a3ed75f6f640ad7d1e0c5756e01bf1443172d3d..d6deb963f5ff9131d813a39eb13c3281c65df941 100644 (file)
@@ -388,7 +388,8 @@ typedef
       Xin_SseCMov,   /* SSE conditional move */
       Xin_SseShuf,   /* SSE2 shuffle (pshufd) */
       Xin_EvCheck,   /* Event check */
-      Xin_ProfInc    /* 64-bit profile counter increment */
+      Xin_ProfInc,   /* 64-bit profile counter increment */
+      Xin_IfThenElse /* HInstrIfThenElse */
    }
    X86InstrTag;
 
@@ -652,6 +653,9 @@ typedef
                installed later, post-translation, by patching it in,
                as it is not known at translation time. */
          } ProfInc;
+         struct {
+            HInstrIfThenElse* hite;
+         } IfThenElse;
 
       } Xin;
    }
@@ -708,15 +712,18 @@ extern X86Instr* X86Instr_SseShuf   ( Int order, HReg src, HReg dst );
 extern X86Instr* X86Instr_EvCheck   ( X86AMode* amCounter,
                                       X86AMode* amFailAddr );
 extern X86Instr* X86Instr_ProfInc   ( void );
+extern X86Instr* X86Instr_IfThenElse(HInstrIfThenElse*);
 
 
 extern void ppX86Instr ( const X86Instr*, Bool );
+extern void ppX86CondCode(X86CondCode);
 
 /* Some functions that insulate the register allocator from details
    of the underlying instruction set. */
 extern void         getRegUsage_X86Instr ( HRegUsage*, const X86Instr*, Bool );
 extern void         mapRegs_X86Instr     ( HRegRemap*, X86Instr*, Bool );
 extern Bool         isMove_X86Instr      ( const X86Instr*, HReg*, HReg* );
+extern HInstrIfThenElse* isIfThenElse_X86Instr(X86Instr*);
 extern Int          emit_X86Instr   ( /*MB_MOD*/Bool* is_profInc,
                                       UChar* buf, Int nbuf, const X86Instr* i, 
                                       Bool mode64,
@@ -735,7 +742,7 @@ extern X86Instr* directReload_X86 ( X86Instr* i, HReg vreg, Short spill_off );
 
 extern const RRegUniverse* getRRegUniverse_X86 ( void );
 
-extern HInstrArray* iselSB_X86           ( const IRSB*,
+extern HInstrSB* iselSB_X86              ( const IRSB*,
                                            VexArch,
                                            const VexArchInfo*,
                                            const VexAbiInfo*,