mmc: sdhci-of-dwcmshc: Change DLL_STRBIN_TAPNUM_DEFAULT to 0x4

commit a28352cf2d2f8380e7aca8cb61682396dca7a991 upstream.

strbin signal delay under 0x8 configuration is not stable after massive
test. The recommandation of it should be 0x4.

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Tested-by: Alexey Charkov <alchark@gmail.com>
Tested-by: Hugh Cole-Baker <sigmaris@gmail.com>
Fixes: 08f3dff799d4 ("mmc: sdhci-of-dwcmshc: add rockchip platform support")
Cc: stable@vger.kernel.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/mmc/host/sdhci-of-dwcmshc.c b/drivers/mmc/host/sdhci-of-dwcmshc.c
index ee6b1096f70921aeabbf8f615622bfbb0980cd54..e23a590af722222a2af9c20060fb715e717efdfb 100644 (file)
--- a/drivers/mmc/host/sdhci-of-dwcmshc.c
+++ b/drivers/mmc/host/sdhci-of-dwcmshc.c
@@ -94,7 +94,7 @@
 #define DLL_TXCLK_TAPNUM_DEFAULT       0x10
 #define DLL_TXCLK_TAPNUM_90_DEGREES    0xA
 #define DLL_TXCLK_TAPNUM_FROM_SW       BIT(24)
-#define DLL_STRBIN_TAPNUM_DEFAULT      0x8
+#define DLL_STRBIN_TAPNUM_DEFAULT      0x4
 #define DLL_STRBIN_TAPNUM_FROM_SW      BIT(24)
 #define DLL_STRBIN_DELAY_NUM_SEL       BIT(26)
 #define DLL_STRBIN_DELAY_NUM_OFFSET    16